FBFM2112F897CSLJLS View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

FBFM2112F897CSLJLS

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip

Intel 

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip Data Sheet

3.1.4.3

3.1.4.4

3.1.5

Note:

PCS - Messaging

The PCS supports simple in-band messaging; it is capable of

transmitting or receiving up to 24 bits of information.

Upon receiving an FSIG symbol, the PCS registers the lower 24 bits and

indicates that an FSIG symbol has been detected, with interrupt

generation.

The PCS can transmit an FSIG message. The lower 24 bits are

registered and the PCS is forced to transmit the FSIG symbol, with

interrupt generation.

PCS - Balancing the Inter-Frame Gap (IFG)

From the requirement Clause 48 (that frame transmission begins on

Lane 0) there is an option of two separate implementations, both

supported in the FM2112, as follows:

• Guarantee minimum IFG: The MAC always inserts additional idle characters to align

the start of preamble on a four byte boundary. Note that this will reduce the

effective data rate for certain packet sizes separated with minimum inter-frame

spacing.

• Maintain an average minimum IFG: The MAC sometimes inserts and sometimes

deletes idle characters to align the Start control character. A Deficit Idle Count

(DIC) represents the cumulative count of idle characters deleted or inserted, and

this count is bound to a minimum value of zero and maximum value of three. Note

that this may result in inter-frame spacing observed on the transmit XGMII that is

up to three octets shorter than the minimum transmitted inter-frame spacing

specified in Clause 46.

IFG Stretch (IFGS)

{Registers Described in Table 152, Table 153, and Table 154}

At the link level, frames can no longer be re-ordered. So if the scheduler picks a frame

to transmit that can't go because of the IFGS and the frame priority, it is not acceptable

for a higher priority frame behind it to be transmitted first even if it meets the

watermark check in EPL_PACE_PRI_WM[i].

The index used [0..7] is retrieved from the switch priority to egress

priority table TXPRI_MAP regardless if the priority regeneration is

enabled or not.

Inter-Frame Gap Stretch is a feature that affects the amount of idle

characters between packets for the purpose of congestion

management. Therefore it should be thought of as being above the

XGMII. Since it is independent of MAC functionality, it is described in its

own section, as follows:

This feature is not an IEEE compliant feature. However it is a pre-

standard implementation of a feature set currently being defined within

the IEEE 802.3ar congestion management task force.

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