FBFM2112F897CSLJLS View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

FBFM2112F897CSLJLS

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip

Intel 

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip Data Sheet

A maximal configuration 2-tier fat tree has 288 network facing ports

and consists of 24 line switches and 12 fabric switches. Each line switch

has 12 of its ports facing the network and 12 ports connected to the

fabric switches, one port per fabric switch. Sub-maximal configurations

are possible, such as a 144-port system with 12 line and 6 fabric

switches. In that case, each line switch still has 12 network facing

ports, but has 2 ports connected to each of the 6 fabric switches.

The link aggregation hardware features are used to distribute

conversations from each line chip across the fabric chips.

• The line chip treats all the fabric chips as being in the same link aggregation group.

When an address is not known, it is flooded to only one of the fabric chips, as

determined by the hash distribution function.

• The fabric chips view each line chip as being separate (not in the same link

aggregation group). When an address is not known, the fabric chip floods the frame

to all of the ports except the port that the frame came in on.

Figure 8.

Federated Switch Support

The link-aggregation hash function may be configured to produce a

symmetrical result for both directions of traffic flow in a conversation.

In a conversation between two MAC addresses, MAC A and MAC B, the

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