FBFM2112F897CSLJLS View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

FBFM2112F897CSLJLS

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip

Intel 

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip Data Sheet

3.3.3.1

Figure 11. PWD Implementation

Tail Drop versus PWD

In the FM2112, there are five rules for discarding frames for congestion

management:

•

The Rx shared watermark

drop. [PWD is not used in

tfhoirsdciascsaer,ditisise1x0c0e% ededdr:oprx].i

>

RxSDi

—>100%

packet

•

The Tx shared watermark

drop. [PWD is not used in

tfohrisdcisacsaer,ditisise1x0ce0e%deddr:optx]i.

>

TxSDi

—>100%

packet

• The global-PWD-low discard watermark is exceeded and for this switch priority and

traffic type,

(Global Low

it is configured

Discard). PWD

to check against the

is applied to GLD.

low

watermark;

sum(yi)

>

GLD

• The global-PWD-high discard watermark is exceeded and for this switch priority

and traffic type, it is configured to check against the high watermark; sum(yi) >

47

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