PIC32MX230F128L-I/PF View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC32MX230F128L-I/PF
Microchip Technology
PIC32MX230F128L-I/PF Datasheet PDF : 382 Pages
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PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
REGISTER 23-13: C1FLTCON3: CAN FILTER CONTROL REGISTER 3
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1
31:24
23:16
15:8
7:0
R/W-0
FLTEN15
R/W-0
FLTEN14
R/W-0
FLTEN13
R/W-0
FLTEN12
R/W-0
R/W-0
MSEL15<1:0>
R/W-0
R/W-0
MSEL14<1:0>
R/W-0
R/W-0
MSEL13<1:0>
R/W-0
R/W-0
MSEL12<1:0>
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
FSEL15<4:0>
R/W-0
FSEL14<4:0>
R/W-0
FSEL13<4:0>
R/W-0
FSEL12<4:0>
R/W-0
R/W-0
R/W-0
R/W-0
Bit
24/16/8/0
R/W-0
R/W-0
R/W-0
R/W-0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31
bit 30-29
bit 28-24
bit 23
bit 22-21
FLTEN15: Filter 15 Enable bit
1 = Filter is enabled
0 = Filter is disabled
MSEL15<1:0>: Filter 15 Mask Select bits
11 = Acceptance Mask 3 selected
10 = Acceptance Mask 2 selected
01 = Acceptance Mask 1 selected
00 = Acceptance Mask 0 selected
FSEL15<4:0>: FIFO Selection bits
11111 = Reserved
•
•
•
10000 = Reserved
01111 = Message matching filter is stored in FIFO buffer 15
•
•
•
00000 = Message matching filter is stored in FIFO buffer 0
FLTEN14: Filter 14 Enable bit
1 = Filter is enabled
0 = Filter is disabled
MSEL14<1:0>: Filter 14 Mask Select bits
11 = Acceptance Mask 3 selected
10 = Acceptance Mask 2 selected
01 = Acceptance Mask 1 selected
00 = Acceptance Mask 0 selected
Note: The bits in this register can only be modified if the corresponding filter enable (FLTENn) bit is ‘0’.
DS60001290E-page 262
2014-2017 Microchip Technology Inc.
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