PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
5.0 INTERRUPT CONTROLLER
Note:
This data sheet summarizes the features
of the PIC32MX1XX/2XX/5XX 64/100-pin
family of devices. It is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to Section 8. “Interrupt
Controller” (DS60001108) in the “PIC32
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com/PIC32).
PIC32MX1XX/2XX/5XX 64/100-pin devices generate
interrupt requests in response to interrupt events from
peripheral modules. The interrupt control module exists
externally to the CPU logic and prioritizes the interrupt
events before presenting them to the CPU.
The PIC32MX1XX/2XX/5XX 64/100-pin interrupt
module includes the following features:
• Up to 76 interrupt sources
• Up to 46 interrupt vectors
• Single and multi-vector mode operations
• Five external interrupts with edge polarity control
• Interrupt proximity timer
• Seven user-selectable priority levels for each
vector
• Four user-selectable subpriority levels within each
priority
• Software can generate any interrupt
• User-configurable interrupt vector table location
• User-configurable interrupt vector spacing
Note: The dedicated shadow register set is not
available on these devices.
FIGURE 5-1:
INTERRUPT CONTROLLER MODULE BLOCK DIAGRAM
Interrupt Controller
Vector Number
Priority Level
CPU Core
2014-2017 Microchip Technology Inc.
DS60001290E-page 53