PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
TABLE 5-1: INTERRUPT IRQ, VECTOR AND BIT LOCATION (CONTINUED)
Interrupt Source(1)
IRQ #
Vector
#
Flag
Interrupt Bit Location
Enable
Priority
Sub-priority
Persistent
Interrupt
CNA – PORTA Input Change Interrupt 44
33 IFS1<12> IEC1<12> IPC8<12:10>
IPC8<9:8>
Yes
CNB – PORTB Input Change Interrupt 45
33 IFS1<13> IEC1<13> IPC8<12:10>
IPC8<9:8>
Yes
CNC – PORTC Input Change Interrupt 46
33 IFS1<14> IEC1<14> IPC8<12:10>
IPC8<9:8>
Yes
CND – PORTD Input Change Interrupt 47
33 IFS1<15> IEC1<15> IPC8<12:10>
IPC8<9:8>
Yes
CNE – PORTE Input Change Interrupt 48
33 IFS1<16> IEC1<16> IPC8<12:10>
IPC8<9:8>
Yes
CNF – PORTF Input Change Interrupt 49
33 IFS1<17> IEC1<17> IPC8<12:10>
IPC8<9:8>
Yes
CNG – PORTG Input Change Interrupt 50
33 IFS1<18> IEC1<18> IPC8<12:10>
IPC8<9:8>
Yes
PMP – Parallel Master Port
51 34 IFS1<19> IEC1<19> IPC8<20:18> IPC8<17:16>
Yes
PMPE – Parallel Master Port Error
52 34 IFS1<20> IEC1<20> IPC8<20:18> IPC8<17:16>
Yes
SPI2E – SPI2 Fault
53 35 IFS1<21> IEC1<21> IPC8<28:26> IPC8<25:24>
Yes
SPI2RX – SPI2 Receive Done
54 35 IFS1<22> IEC1<22> IPC8<28:26> IPC8<25:24>
Yes
SPI2TX – SPI2 Transfer Done
55 35 IFS1<23> IEC1<23> IPC8<28:26> IPC8<25:24>
Yes
U2E – UART2 Error
56 36 IFS1<24> IEC1<24> IPC9<4:2>
IPC9<1:0>
Yes
U2RX – UART2 Receiver
57 36 IFS1<25> IEC1<25> IPC9<4:2>
IPC9<1:0>
Yes
U2TX – UART2 Transmitter
58 36 IFS1<26> IEC1<26> IPC9<4:2>
IPC9<1:0>
Yes
I2C2B – I2C2 Bus Collision Event
59
37 IFS1<27> IEC1<27> IPC9<12:10>
IPC9<9:8>
Yes
I2C2S – I2C2 Slave Event
60
37 IFS1<28> IEC1<28> IPC9<12:10>
IPC9<9:8>
Yes
I2C2M – I2C2 Master Event
61
37 IFS1<29> IEC1<29> IPC9<12:10>
IPC9<9:8>
Yes
U3E – UART3 Error
62 38 IFS1<30> IEC1<30> IPC9<20:18> IPC9<17:16>
Yes
U3RX – UART3 Receiver
63 38 IFS1<31> IEC1<31> IPC9<20:18> IPC9<17:16>
Yes
U3TX – UART3 Transmitter
64 38 IFS2<0> IEC2<0> IPC9<20:18> IPC9<17:16>
Yes
U4E – UART4 Error
65 39 IFS2<1> IEC2<1> IPC9<28:26> IPC9<25:24>
Yes
U4RX – UART4 Receiver
66 39 IFS2<2> IEC2<2> IPC9<28:26> IPC9<25:24>
Yes
U4TX – UART4 Transmitter
U5E – UART5 Error(2)
U5RX – UART5 Receiver(2)
U5TX – UART5 Transmitter(2)
CTMU – CTMU Event(2)
67 39 IFS2<3> IEC2<3> IPC9<28:26> IPC9<25:24>
Yes
68
40 IFS2<4> IEC2<4> IPC10<4:2>
IPC10<1:0>
Yes
69
40 IFS2<5> IEC2<5> IPC10<4:2>
IPC10<1:0>
Yes
70
40 IFS2<6> IEC2<6> IPC10<4:2>
IPC10<1:0>
Yes
71 41 IFS2<7> IEC2<7> IPC10<12:10> IPC10<9:8>
Yes
DMA0 – DMA Channel 0
72 42 IFS2<8> IEC2<8> IPC10<20:18> IPC10<17:16>
No
DMA1 – DMA Channel 1
DMA2 – DMA Channel 2
DMA3 – DMA Channel 3
CMP3 – Comparator 3 Interrupt
73 43 IFS2<9> IEC2<9> IPC10<28:26> IPC10<25:24>
No
74 44 IFS2<10> IEC2<10> IPC11<4:2>
IPC11<1:0>
No
75 45 IFS2<11> IEC2<11> IPC11<12:10> IPC11<9:8>
No
76 46 IFS2<12> IEC2<12> IPC11<20:18> IPC11<17:16>
No
CAN1 – CAN1 Event
77 47 IFS2<13> IEC2<13> IPC11<28:26> IPC11<25:24>
Yes
SPI3E – SPI3 Fault
78
48 IFS2<14> IEC2<14> IPC12<4:2>
IPC12<1:0>
Yes
SPI3RX – SPI3 Receive Done
79
48 IFS2<15> IEC2<15> IPC12<4:2>
IPC12<1:0>
Yes
SPI3TX – SPI3 Transfer Done
SPI4E – SPI4 Fault(2)
SPI4RX – SPI4 Receive Done(2)
SPI4TX – SPI4 Transfer Done(2)
80
48 IFS2<16> IEC2<16> IPC12<4:2>
IPC12<1:0>
Yes
81 49 IFS2<17> IEC2<17> IPC12<12:10> IPC12<9:8>
Yes
82 49 IFS2<18> IEC2<18> IPC12<12:10> IPC12<9:8>
Yes
83 49 IFS2<19> IEC2<19> IPC12<12:10> IPC12<9:8>
Yes
Lowest Natural Order Priority
Note 1:
2:
Not all interrupt sources are available on all devices. See TABLE 1: “PIC32MX1XX/2XX/5XX 64/100-pin Controller
Family Features” for the list of available peripherals.
This interrupt source is not available on 64-pin devices.
2014-2017 Microchip Technology Inc.
DS60001290E-page 55