PIC32MX230F128L-I/PF View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC32MX230F128L-I/PF

32-bit Microcontrollers (up to 512 KB Flash and 64 KB SRAM) with Audio/Graphics/Touch (HMI), CAN, USB, and Advanced Analog

Microchip Technology 

PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY

REGISTER 5-4: IFSx: INTERRUPT FLAG STATUS REGISTER

Bit

Range

31:24

23:16

15:8

7:0

Bit

31/23/15/7

R/W-0

IFS31

R/W-0

IFS23

R/W-0

IFS15

R/W-0

IFS7

Bit

30/22/14/6

R/W-0

IFS30

R/W-0

IFS22

R/W-0

IFS14

R/W-0

IFS6

Bit

29/21/13/5

R/W-0

IFS29

R/W-0

IFS21

R/W-0

IFS13

R/W-0

IFS5

Bit

Bit

28/20/12/4 27/19/11/3

R/W-0

IFS28

R/W-0

IFS27

R/W-0

IFS20

R/W-0

IFS19

R/W-0

IFS12

R/W-0

IFS11

R/W-0

IFS4

R/W-0

IFS3

Bit

26/18/10/2

R/W-0

IFS26

R/W-0

IFS18

R/W-0

IFS10

R/W-0

IFS2

Bit

25/17/9/1

R/W-0

IFS25

R/W-0

IFS17

R/W-0

IFS9

R/W-0

IFS1

Bit

24/16/8/0

R/W-0

IFS24

R/W-0

IFS16

R/W-0

IFS8

R/W-0

IFS0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 31-0

IFS31-IFS0: Interrupt Flag Status bits

1 = Interrupt request has occurred

0 = No interrupt request has occurred

Note: This register represents a generic definition of the IFSx register. Refer to Table 5-1 for the exact bit

definitions.

REGISTER 5-5: IECx: INTERRUPT ENABLE CONTROL REGISTER

Bit

Range

31:24

23:16

15:8

7:0

Bit

31/23/15/7

R/W-0

IEC31

R/W-0

IEC23

R/W-0

IEC15

R/W-0

IEC7

Bit

30/22/14/6

R/W-0

IEC30

R/W-0

IEC22

R/W-0

IEC14

R/W-0

IEC6

Bit

29/21/13/5

R/W-0

IEC29

R/W-0

IEC21

R/W-0

IEC13

R/W-0

IEC5

Bit

Bit

28/20/12/4 27/19/11/3

R/W-0

IEC28

R/W-0

IEC27

R/W-0

IEC20

R/W-0

IEC19

R/W-0

IEC12

R/W-0

IEC11

R/W-0

IEC4

R/W-0

IEC3

Bit

26/18/10/2

R/W-0

IEC26

R/W-0

IEC18

R/W-0

IEC10

R/W-0

IEC2

Bit

25/17/9/1

R/W-0

IEC25

R/W-0

IEC17

R/W-0

IEC9

R/W-0

IEC1

Bit

24/16/8/0

R/W-0

IEC24

R/W-0

IEC16

R/W-0

IEC8

R/W-0

IEC0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 31-0 IEC31-IEC0: Interrupt Enable bits

1 = Interrupt is enabled

0 = Interrupt is disabled

Note: This register represents a generic definition of the IECx register. Refer to Table 5-1 for the exact bit

definitions.

DS60001290E-page 60

 2014-2017 Microchip Technology Inc.

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