Physical Interfaces—Inte® Quark SoC X1000
Table 12. SD/SDIO/MMC Signals (Sheet 2 of 2)
Signal Name
SD_WP
SD_CD_B
SD_LED
SD_PWR
Dir Term Power
I 20k(L) 3.3V
I 20k(H) 3.3V
O
-
3.3V
O
-
3.3V
Type
CMOS3.3
CMOS3.3
CMOS3.3
CMOS3.3
S4/S5
Off
Off
Off
Off
Default Buffer State
S3
Reset
Off
Pull-down
Off
Pull-up
Off
VOL
Off
VOL
Enter S0
Pull-down
Pull-up
VOL
VOL
2.8
High Speed UART Interface Signals
The SoC features two separate High Speed UARTs. However, only UART0 provides the
Modem Control pins DCD, DSR, DTR and RI.
See Chapter 18.0, “High Speed UART” for more details of the HSUART interface signals.
Table 13. High Speed UART Signals
Default Buffer State
Signal Name
Dir Term Power
Type
S4/S5
S3
Reset
Enter S0
SIU0_CTS_B
SIU0_DCD_B
SIU0_DSR_B
SIU0_DTR_B
SIU0_RI_B
SIU0_RTS_B
SIU0_RXD
SIU0_TXD
SIU1_CTS_B
SIU1_RTS_B
SIU1_RXD
SIU1_TXD
I 20k(H) 3.3V
CMOS3.3
Off
I 20k(H) 3.3V
CMOS3.3
Off
I 20k(H) 3.3V
CMOS3.3
Off
O
-
3.3V
CMOS3.3
Off
I 20k(H) 3.3V
CMOS3.3
Off
O
-
3.3V
CMOS3.3
Off
I 20k(H) 3.3V
CMOS3.3
Off
O
-
3.3V
CMOS3.3
Off
I 20k(H) 3.3V
CMOS3.3
Off
O
-
3.3V
CMOS3.3
Off
I 20k(H) 3.3V
CMOS3.3
Off
O
-
3.3V
CMOS3.3
Off
Off
Pull-up
Pull-up
Off
Pull-up
Pull-up
Off
Pull-up
Pull-up
Off
VOH
VOH
Off
Pull-up
Pull-up
Off
VOH
VOH
Off
Pull-up
Pull-up
Off
VOH
VOH
Off
Pull-up
Pull-up
Off
VOH
VOH
Off
Pull-up
Pull-up
Off
VOH
VOH
2.9
I2C* Interface Signals
See Chapter 19.0, “I2C* Controller/GPIO Controller” for more details of the I2C
Interface signals.
Table 14. I2C* Signals
Default Buffer State
Signal Name
Dir Term Power
Type
S4/S5
S3
Reset
Enter S0
I2C_DATA
I2C_CLK
I/O Ext
3.3V CMOS3.3_OD
Off
I/O Ext
3.3V CMOS3.3_OD
Off
Off
Pull-up
Pull-up
Off
Pull-up
Pull-up
October 2013
Document Number: 329676-001US
Inte® Quark SoC X1000
DS
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