DHQ1ECCSECETS1SR1WH View Datasheet(PDF) - Intel
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DHQ1ECCSECETS1SR1WH Datasheet PDF : 921 Pages
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Physical Interfaces—Inte® Quark SoC X1000
2.12
Real Time Clock (RTC) Interface Signals
See Section 21.10 for more details of the RTC interface signals.
Table 17. Real Time Clock (RTC) Interface Signals
Signal Name
RTCX1
RTCX2
IVCCRTCEXT
RTCRST_B
RTC_EXT_CLK_EN_B
Dir Term Power
I
-
O
-
I/O
-
I
-
I
-
<1V
<1V
1.5V
3.3V
3.3V
Type
Analog
Analog
Analog
CMOS3.3
CMOS3.3
S4/S5
Running
Running
Analog
ViH
ViH/ViL
Default Buffer State
S3
Running
Running
Analog
ViH
ViH/ViL
Reset
Running
Running
Analog
ViH
ViH/ViL
Enter S0
Running
Running
Analog
ViH
ViH/ViL
2.13
Power Management Signals
See Chapter 8.0, “Power Management” for more details of the Power Management
interface signals.
Table 18. Power Management Interface Signals
Signal Name
PWR_BTN
RESET_BTN
S5_PG
S3_PG
S0_PG
S0_1P0_PG
S3_3V3_EN
S3_1V5_EN
S0_3V3_EN
S0_1V5_EN
S0_1P0_EN
ODRAM_PWROK
OSYSPWRGOOD
VNNSENSE
VSSSENSE
Dir Term Power
I
-
I 20k(H)
I
-
I
-
I
-
I
-
O
Ext
O
Ext
O
Ext
O
Ext
O
Ext
O
Ext
O
Ext
I/O
-
I/O
-
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
1.05V
GND
Type
CMOS3.3
CMOS3.3
CMOS3.3
CMOS3.3
CMOS3.3
CMOS3.3
CMOS3.3
CMOS3.3
CMOS3.3
CMOS3.3
CMOS3.3
CMOS3.3_OD
CMOS3.3_OD
Analog
Analog
S4/S5
ViH
Off
ViH
ViL
ViL
ViL
VOL
VOL
Pull-down
Pull-down
Pull-down
Pull-up
Pull-up
Analog
Analog
Default Buffer State
S3
ViH
Pull-up
ViH
ViH
ViL
ViL
VOH
VOH
VOL
VoL
VoL
Pull-up
Pull-up
Analog
Analog
Reset
ViH
Pull-up
ViH
ViH
ViH
ViH
VOH
VOH
VOL
VoH
VoH
Pull-up
Pull-up
Analog
Analog
Enter S0
ViH
Pull-up
ViH
ViH
ViH
ViH
VOH
VOH
VOiH
VoH
VoH
Pull-up
Pull-up
Analog
Analog
2.14
JTAG and Debug Interface Signals
See Chapter 22.0, “Debug Port and JTAG/TAP” for more details of the JTAG interface
signals.
October 2013
Document Number: 329676-001US
Inte® Quark SoC X1000
DS
53
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