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DHQ1ECCSECETS1SR1WH View Datasheet(PDF) - Intel

Part Name
Description
Manufacturer
DHQ1ECCSECETS1SR1WH
Intel
Intel 
DHQ1ECCSECETS1SR1WH Datasheet PDF : 921 Pages
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Physical Interfaces—Inte® Quark SoC X1000
2.17
Power And Ground Pins
Table 22. Power and Ground Pins (Sheet 1 of 2)
Signal Name
OVOUT_1P0_S5
VCC1P0_S5
VCCAICLKCB_1P0
VCCAICLKDBUFF_1P0
VCCAICLKSSC1_1P0
VCCDICLKDIG_1P0
VCCAICLKSFR_1P5
OVOUT_1P8_S5
VCC1P8_S5
VCC3P3_S5
VCCAICLKSE_3P3
OVOUT_1P0_S3
VCC1P0_S3
VCCCLKDDR_1P5
VCCDDR_1P5
OVOUT_1P8_S3
VCC1P8_S3
VCCAUSB_1P8_S3
VCC3P3_S3
VCC3P3_USB_S3
Nominal
Voltage
1.0V
1.5V
1.8V
3.3V
1.0V
1.5V
1.8V
3.3V
Lowest
Active State
Description/Notes
S5 1.0V Rail Standby LDO Output
Standard 1.0V Rail for S5 Logic
ICLK Control Supply
ICLK Differential Output Buffer Supply
ICLK SSC Supply
S5
ICLK Digital Supply
ICLK SFR (for Oscillator, IPLL)
S5 1.8V Rail Standby LDO Output
S5 1.8V CFIO Supply
S5 3.3V Rail Standby LDO Input
ICLK Single Ended Output Buffer Supply
S3 1.0V Rail Standby LDO Output
Standard 1.0V Rail for S3 logic
DDR IO Clock Analog Thick Gate Isolated Quiet Supply
DDR IO Analog Thick Gate Supply
S3 1.8V Rail Standby LDO Output
S3
S3 1.8V CFIO Supply
USB 1.8V Supply
S3 3.3V Rail Standby LDO Input
USB 3.3V Supply
The USB PHY resides in the S3 power domain. However, from a
functional point of view USB is only active in S0.
October 2013
Document Number: 329676-001US
Inte® Quark SoC X1000
DS
55

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