DSPIC33EV64GM102-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC33EV64GM102-I/SO

16-Bit, 5V Digital Signal Controllers with PWM, SENT, Op Amps and Advanced Analog Features

Microchip Technology 

dsPIC33EVXXXGM00X/10X FAMILY

4.0 MEMORY ORGANIZATION

Note:

This data sheet summarizes the features

of the dsPIC33EVXXXGM00X/10X family

of devices. It is not intended to be a

comprehensive reference source. To com-

plement the information in this data sheet,

refer to “dsPIC33E/PIC24E Program

Memory” (DS70000613) in the “dsPIC33/

PIC24 Family Reference Manual”, which is

available from the Microchip web site

(www.microchip.com).

The dsPIC33EVXXXGM00X/10X family architecture

features separate program and data memory spaces

and buses. This architecture also allows the direct

access of program memory from the Data Space (DS)

during code execution.

4.1 Program Address Space

The program address memory space of the

dsPIC33EVXXXGM00X/10X family devices is 4M

instructions. The space is addressable by a 24-bit

value derived either from the 23-bit PC, during program

execution or from table operation, or from DS

remapping, as described in Section 4.7 “Interfacing

Program and Data Memory Spaces”.

User application access to the program memory space

is restricted to the lower half of the address range

(0x000000 to 0x02ABFF). The exception is the use of

the TBLRD operations, which use TBLPAG<7> to read

Device ID sections of the configuration memory space

and the TBLWT operations, which are used to set up the

write latches located in configuration memory space.

The program memory maps, which are presented by

the device family and memory size, are shown in

Figure 4-1 through Figure 4-4.

FIGURE 4-1: PROGRAM MEMORY MAP FOR dsPIC33EV32GM00X/10X DEVICES(1)

GOTO Instruction

Reset Address

Interrupt Vector Table

User Program

Flash Memory

(10944 instructions)

Device Configuration

0x000000

0x000002

0x000004

0x0001FE

0x000200

0x00577E

0x005780

0x0057FE

0x005800

Unimplemented

(Read ‘0’s)

0x7FFFFE

0x800000

Executive Code Memory 0x800BFE

Reserved

0x800C00

0x800F80

User OTP Memory

0x800FFE

0x801000

Reserved

Write Latches

Reserved

DEVID

Reserved

0xF9FFFE

0xFA0000

0xFA0002

0xFA0004

0xFEFFFE

0xFF0000

0xFF0002

0xFF0004

0xFFFFFE

Note 1: Memory areas are not shown to scale.

 2013-2016 Microchip Technology Inc.

DS70005144E-page 31

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