DSPIC33EV64GM102-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC33EV64GM102-I/SO

16-Bit, 5V Digital Signal Controllers with PWM, SENT, Op Amps and Advanced Analog Features

Microchip Technology 

TABLE 4-7: ADC1 REGISTER MAP

SFR

Name

Addr. Bit 15 Bit 14 Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7 Bit 6 Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

ADC1BUF0 0300

ADC1 Data Buffer 0

ADC1BUF1 0302

ADC1 Data Buffer 1

ADC1BUF2 0304

ADC1 Data Buffer 2

ADC1BUF3 0306

ADC1 Data Buffer 3

ADC1BUF4 0308

ADC1 Data Buffer 4

ADC1BUF5 030A

ADC1 Data Buffer 5

ADC1BUF6 030C

ADC1 Data Buffer 6

ADC1BUF7 030E

ADC1 Data Buffer 7

ADC1BUF8 0310

ADC1 Data Buffer 8

ADC1BUF9 0312

ADC1 Data Buffer 9

ADC1BUFA 0314

ADC1 Data Buffer 10

ADC1BUFB 0316

ADC1 Data Buffer 11

ADC1BUFC 0318

ADC1 Data Buffer 12

ADC1BUFD 031A

ADC1 Data Buffer 13

ADC1BUFE 031C

ADC1 Data Buffer 14

ADC1BUFF 031E

ADC1 Data Buffer 15

AD1CON1 0320 ADON — ADSIDL ADDMABM

—

AD12B FORM1 FORM0 SSRC2 SSRC1 SSRC0 SSRCG SIMSAM ASAM

SAMP

AD1CON2 0322 VCFG2 VCFG1 VCFG0

—

—

CSCNA CHPS1

CHPS0 BUFS SMPI4 SMPI3 SMPI2

SMPI1

SMPI0

BUFM

AD1CON3 0324 ADRC —

—

SAMC4 SAMC3 SAMC2 SAMC1

SAMC0 ADCS7 ADCS6 ADCS5 ADCS4 ADCS3

ADCS2

ADCS1

AD1CHS123 0326 —

—

— CH123SB2 CH123SB1 CH123NB1 CH123NB0 CH123SB0 —

—

— CH123SA2 CH123SA1 CH123NA1 CH123NA0

AD1CHS0 0328 CH0NB — CH0SB5 CH0SB4 CH0SB3 CH0SB2 CH0SB1 CH0SB0 CH0NA — CH0SA5 CH0SA4 CH0SA3 CH0SA2 CH0SA1

AD1CSSH 032E

CSS<31:24>

—

—

—

—

CSS<19:16>

AD1CSSL 0330

CSS<15:0>

AD1CON4 0332 —

—

—

—

—

—

—

ADDMAEN —

—

—

—

—

DMABL2 DMABL1

Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

DONE

ALTS

ADCS0

CH123SA0

CH0SA0

DMABL0

xxxx

xxxx

xxxx

xxxx

xxxx

xxxx

xxxx

xxxx

xxxx

xxxx

xxxx

xxxx

xxxx

xxxx

xxxx

xxxx

0000

0000

0000

0000

0000

0000

0000

0000

TABLE 4-8: CTMU REGISTER MAP

SFR

Name

Addr. Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2 Bit 1

CTMUCON1 033A CTMUEN

— CTMUSIDL TGEN EDGEN EDGSEQEN IDISSEN CTTRIG

—

—

—

—

—

—

—

CTMUCON2 033C EDG1MOD EDG1POL EDG1SEL3 EDG1SEL2 EDG1SEL1 EDG1SEL0 EDG2STAT EDG1STAT EDG2MOD EDG2POL EDG2SEL3 EDG2SEL2 EDG2SEL1 EDG2SEL0 —

CTMUICON 033E ITRIM5 ITRIM4 ITRIM3 ITRIM2 ITRIM1

ITRIM0

IRNG1

IRNG0

—

—

—

—

—

—

—

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

All

Bit 0 Reset

s

— 0000

— 0000

— 0000

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