Electrical characteristics
3.19.2.1 SerDes spread-spectrum clock source recommendations
SDn_REF_CLKn_P/SDn_REF_CLKn_N are designed to work with spread-spectrum
clock for PCI Express protocol only with the spreading specification defined in Table 59.
When using spread-spectrum clocking for PCI Express, both ends of the link partners
should use the same reference clock. For best results, a source without significant
unintended modulation must be used.
For SATA protocol, the SerDes transmitter does not support spread-spectrum clocking.
The SerDes receiver does support spread-spectrum clocking on receive, which means the
SerDes receiver can receive data correctly from a SATA serial link partner using spread-
spectrum clocking
The spread-spectrum clocking cannot be used if the same SerDes reference clock is
shared with other non-spread-spectrum supported protocols. For example, if the spread-
spectrum clocking is desired on a SerDes reference clock for PCI Express and the same
reference clock is used for any other protocol such as SATA/SGMII/QSGMII/SRIO/
XAUI due to the SerDes lane usage mapping option, spread-spectrum clocking cannot be
used at all.
Table 59. SerDes spread-spectrum clock source recommendations1
Parameter
Frequency modulation
Frequency spread
Notes:
1. At recommended operating conditions. See Table 3.
2. Only down-spreading is allowed.
Min
30
+0
Max
33
-0.5
Unit
kHz
%
Notes
-
2
3.19.2.2 SerDes reference clock receiver characteristics
This figure shows a receiver reference diagram of the SerDes reference clocks.
QorIQ T2080 Data Sheet, Rev. 3, 03/2018
100
NXP Semiconductors