T2080NXE8MQLB View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
T2080NXE8MQLB Datasheet PDF : 186 Pages
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Output
Z0= 50 Ω
Electrical characteristics
RL = 50 Ω
(L/O) VDD/2
Figure 31. GPIO AC test load
3.19 High-speed serial interfaces (HSSI)
The chip features a serializer/deserializer (SerDes) interface to be used for high-speed
serial interconnect applications. The SerDes interface can be used for PCI Express,
SATA, Serial RapidIO, XAUI, XFI, Aurora, HiGig, SGMII and QSGMII data transfers.
This section describes the common portion of SerDes DC electrical specifications: the
DC requirement for SerDes reference clocks. The SerDes data lane's transmitter (Tx) and
receiver (Rx) reference circuits are also shown.
3.19.1 Signal terms definition
The SerDes utilizes differential signaling to transfer data across the serial link. This
section defines the terms that are used in the description and specification of differential
signals.
This figure shows how the signals are defined. For illustration purposes only, one SerDes
lane is used in the description. This figure shows the waveform for either a transmitter
output (SD_TXn_P and SD_TXn_N) or a receiver input (SD_RXn_P and SD_RXn_N).
Each signal swings between A volts and B volts where A > B.
QorIQ T2080 Data Sheet, Rev. 3, 03/2018
NXP Semiconductors
97
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