ADSP-BF526BBCZ-4AX View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADSP-BF526BBCZ-4AX

Blackfin® Embedded Processor

Analog Devices 

Preliminary Technical Data

ADSP-BF522/523/524/525/526/527

Table 10. Signal Descriptions (Continued)

Signal Name

Port J: Multiplexed Peripherals

PJ0: PPI_FS1/TMR0

PJ1: PPI_CLK/TMRCLK

PJ2: SCL

PJ3: SDA

Real Time Clock

RTXI

RTXO

JTAG Port

TCK

TDO

TDI

TMS

TRST

EMU

Clock

CLKIN

XTAL

CLKBUF

Mode Controls

RESET

NMI

BMODE3–0

ADSP-BF523/525/527 Voltage Regulation I/F

VRSEL

VROUT/EXT_WAKE1

EXT_WAKE0

SS/PG

ADSP-BF522/524/526 Voltage Regulation I/F

EXT_WAKE1

EXT_WAKE0

PG

Type Function

I/O PPI Frame Sync1/Timer0

I

PPI Clock/Timer Clock

I/O 5V TWI Serial Clock (This pin is an open-drain output and requires a pull-up

resistor.4)

I/O 5V TWI Serial Data (This pin is an open-drain output and requires a pull-up

resistor.4)

I

RTC Crystal Input (This ball should be pulled low when not used.)

O RTC Crystal Output

I

JTAG Clock

O JTAG Serial Data Out

I JTAG Serial Data In

I JTAG Mode Select

I JTAG Reset (This ball should be pulled low if the JTAG port is not used.)

O Emulation Output

I

Clock/Crystal Input

O Crystal Output

O Buffered XTAL Output

I Reset

I Nonmaskable Interrupt (This ball should be pulled high when not used.)

I Boot Mode Strap 3-0

I Internal/External Voltage Regulator Select

O External FET Drive/Wake up Indication 1

O Wake up Indication 0

I

Soft Start/Power Good

O Wake up Indication 1

O Wake up Indication 0

I

Power Good

Driver

Type1

C

E

E

C

C

C

G

C

C

C

Rev. PrG | Page 25 of 80 | February 2009

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