Preliminary Technical Data
ADSP-BF522/523/524/525/526/527
OPERATING CONDITIONS FOR ADSP-BF523/525/527
Parameter
Conditions
Min
Nominal
Max
Unit
VDDINT
Internal Supply Voltage1
0.95
VDDEXT
External Supply Voltage2, 3 Internal Voltage Regulator
1.70
Disabled
1.8, 2.5 or 3.3
1.26
V
3.6
V
VDDEXT
External Supply Voltage2, 3 Internal Voltage Regulator
2.25
Enabled
2.5 or 3.3
3.6
V
VDDRTC
VDDMEM
VDDOTP
VPPOTP
VDDUSB
VIH
VIH
VIH
VIHTWI
VIL
VIL
VIL
VILTWI
RTC Power Supply Voltage4
MEM Supply Voltage2, 5
OTP Supply Voltage2
OTP Programming Voltage2
USB Supply Voltage6
High Level Input Voltage7, 8
High Level Input Voltage7, 8
High Level Input Voltage7, 8
High Level Input Voltage
Low Level Input Voltage7, 8
Low Level Input Voltage7, 8
Low Level Input Voltage7, 8
Low Level Input Voltage
VDDEXT/VDDMEM = 1.90 V
VDDEXT/VDDMEM = 2.75 V
VDDEXT/VDDMEM = 3.6 V
VDDEXT = 1.90 V/2.75 V/3.6 V
VDDEXT/VDDMEM = 1.7 V
VDDEXT/VDDMEM = 2.25 V
VDDEXT/VDDMEM = 3.0 V
VDDEXT = minimum
2.25
1.70
2.25
2.25
3.0
1.1
1.7
2.0
0.7 x VBUSTWI
–0.3
–0.3
–0.3
–0.3
1.8, 2.5 or 3.3
2.5
2.5
3.3
3.6
V
3.6
V
2.75
V
2.75
V
3.6
V
3.6
V
3.6
V
3.6
V
VBUSTWI9
V
0.6
V
0.7
V
0.8
V
0.3 x VBUSTWI10 V
TJ
Junction Temperature
289-Ball CSP_BGA
0
@ TAMBIENT = 0°C to + 70°C
+105
°C
TJ
Junction Temperature
208-Ball CSP_BGA
0
@ TAMBIENT = 0°C to + 70°C
+105
°C
TJ
Junction Temperature
208-Ball CSP_BGA
–40
@ TAMBIENT = –40°C to +85°C
+105
°C
1 The voltage regulator can generate VDDINT at levels of 1.00 V to 1.20 V with –5% to +5% tolerance when VRCTL is programmed with the sysctl API. This specification is only
guaranteed when the API is used.
2 Must remain powered (even if the associated function is not used).
3 VDDEXT is the supply to the voltage regulator and GPIO.
4 If not used, power with VDDEXT.
5 Balls that use VDDMEM are DATA15–0, ADDR19–1, ABE1–0, ARE, AWE, AOE, AMS3–0, ARDY, SA10, SWE, SCAS, CLKOUT, SRAS, SMS, SCKE. These balls are not tolerant
to voltages higher than VDDMEM.
6 When not using the USB peripheral on the ADSP-BF525/BF527 or terminating VDDUSB on the ADSP-BF523, VDDUSB must be powered by VDDEXT.
7 Bidirectional balls (PF15–0, PG15–0, PH15–0) and input balls (RTXI, TCK, TDI, TMS, TRST, CLKIN, RESET, NMI, and BMODE3–0) of the ADSP-
BF522/523/524/525/526/527 processors are 3.3 V tolerant (always accept up to 3.6 V maximum VIH). Voltage compliance (on outputs, VOH) is limited by the VDDEXT supply
voltage.
8 Parameter value applies to all input and bidirectional balls, except USB_DP, USB_DM, USB_VBUS, SDA, and SCL.
9 The VIHTWI min and max value vary with the selection in the TWI_DT field of the NONGPIO_DRIVE register. See VBUSTWI min and max values in Table 11 on Page 28.
10SDA and SCL are pulled up to VBUSTWI. See Table 11 on Page 28.
Rev. PrG | Page 29 of 80 | February 2009