ADSP-BF522/523/524/525/526/527
RMII _REF_CLK
tREFCLKW
tREFC LK
Preliminary Technical Data
ERxD1-0
ERxDV
ERxER
tRE F CLK IS
tREFCLKIH
Figure 37. 10/100 Ethernet MAC Controller Timing: RMII Receive Signal
RMII _REF_CLK
ETxD1-0
ETxEN
tR EF CLK
tREFCLKOH
tREFC LKOV
Figure 38. 10/100 Ethernet MAC Controller Timing: RMII Transmit Signal
MII CRS, COL
MDC (OUTPUT)
MDIO (OUTPUT)
MDIO (INPUT)
tECRSH
tECOLH
tECRSL
tECOLL
Figure 39. 10/100 Ethernet MAC Controller Timing: Asynchronous Signal
tMDCOH
tMDCOV
tMDIOS tMDCIH
Figure 40. 10/100 Ethernet MAC Controller Timing: MII Station Management
Rev. PrG | Page 62 of 80 | February 2009