STLC5464 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STLC5464 Datasheet PDF : 83 Pages
| |||
STLC5464
IX - EXTERNAL REGISTERS (continued)
IX.5.2 - Receive Command / Indicate Interrupt when TSV = 1
Time Stamping validated (bit of GCR Register)
bit15
bit8 bit7
bit 0
NS Nu Nu Nu G0 A2 A1 A0 Nu Nu C6 C5 C4 C3 C2 C1
T15 T14 T13 T12 T11 T10 T9 T8 T7 T6 T5 T4 T3 T2 T1 T0
These two words are located in the Command/Indicate interrupt queue ; IQSR Register indicates the size
of this interrupt queue located in the external memory.
NS : New Status.
Before writing the features of event in the external memory the Interrupt Controller reads the
NS bit :
if NS = 0, the Interrupt Controller puts this bit at ‘1’ when it writes the new primitive which has
been received.
if NS = 1, the Interrupt Controller puts ICOV bit at ‘1’ to generate an interrupt (IR Register).
When the microprocessor has read the status word, it puts this bit at ‘0’ to acknowledge the new
status. This location becomes free for the Interrupt Controller.
G0 : G0 = 0, GCI 0 corresponding to DIN4 input and DOUT4 output.
G0 = 1, GCI 1 corresponding to DIN5 input and DOUT5 output.
A2/0 : COMMAND/INDICATE Channel 0 to 7 being owned by GCI 0 or GCI 1
C6/1 : New Primitive received twice consecutively
T15/0 : Binary counter value when a new primitive is occurred.
IX.6 - Receive Monitor Interrupt
IX.6.1 - Receive Monitor Interrupt when TSV = 0
TSV : Time Stamping not Validated (bit of GCR Register)
bit15
bit8 bit7
bit 0
NS
G0 A2 A1 A0
ODD A
F
L
M18 M17 M16 M15 M14 M13 M12 M11 M8 M7 M6 M5 M4 M3 M2 M1
These two words are transferred into the Monitor interrupt queue ; IQSR Register indicates the size of this
interrupt queue located in the external memory.
NS : New Status.
Before writing the features of event in the external memory the Interrupt Controller reads the
NS bit :
if NS = 0, the Interrupt Controller stores two new bytes M1/8 and M11/18 then puts NS bit at ‘1’
when it writes the status of these two bytes which has been received.
if NS = 1, the Interrupt Controller puts ICOV bit at ‘1’ to generate an interrupt (IR Register).
G0 : G0 = 0, GCI 0 corresponding to DIN4 input and DOUT4 output.
G0 = 1, GCI 1 corresponding to DIN5 input and DOUT5 output.
L
: Last byte
L = 1, the following word containsthe Last byte of messageif ODD =1, the previous word contains
the Last byte of message if ODD = 0.
L = 0, the following word and the previous word does not contains the Last byte of message.
F
: First byte
F=1, the following word contains the First byte of message.
F=0, the following word does not contain the First byte of message.
A
: Abort
A=1, Received message has been aborted.
80/83
Share Link: 