Z8F041APJ020EG 查看數據表（PDF） - Zilog
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Z8F041APJ020EG Datasheet PDF : 282 Pages
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Z8 Encore! XP® F082A Series
Product Specification
117
Table 69. UART Address Compare Register (U0ADDR)
Bit
7
6
5
4
3
2
1
0
Field
COMP_ADDR
RESET
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
F45H
Bit
Description
[7:0]
Compare Address
COMP_ADDR This 8-bit value is compared to incoming address bytes.
UART Baud Rate High and Low Byte Registers
The UART Baud Rate High (UxBRH) and Low Byte (UxBRL) registers, shown in
Tables 70 and 71, combine to create a 16-bit baud rate divisor value (BRG[15:0]) that sets
the data transmission rate (baud rate) of the UART.
Table 70. UART Baud Rate High Byte Register (U0BRH)
Bit
7
6
5
4
3
2
1
0
Field
BRH
RESET
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
F46H
Bit
[7:0]
BRH
Description
UART Baud Rate High Byte
Table 71. UART Baud Rate Low Byte Register (U0BRL)
Bit
7
6
5
4
3
2
1
0
Field
BRL
RESET
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
F47H
Bit
[7:0]
BRL
Description
UART Baud Rate Low Byte
PS022827-1212
PRELIMINARY
UART Control Register Definitions
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