ATMEGA323L-4AI View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATMEGA323L-4AI

8-bit Microcontroller with 32K Bytes of In-System Programmable Flash

Atmel Corporation 

ATmega323(L)

• Bit 6 – WCOL: Write COLlision Flag

The WCOL bit is set if the SPI Data Register (SPDR) is written during a data transfer.

The WCOL bit (and the SPIF bit) are cleared (zero) by first reading the SPI Status Reg-

ister with WCOL set (one), and then accessing the SPI Data Register.

• Bit 5..1 – Res: Reserved Bits

These bits are reserved bits in the ATmega323 and will always read as zero.

• Bit 0 – SPI2X: Double SPI Speed Bit

When this bit is set (one) the SPI speed (SCK Frequency) will be doubled when the SPI

is in Master mode (see Table 27). This means that the minimum SCK period will be 2

CPU clock periods. When the SPI is configured as Slave, the SPI is only guaranteed to

work at fck/4 or lower.

The SPI interface on the ATmega323 is also used for Program memory and EEPROM

downloading or uploading. See page 197 for Serial Programming and verification.

The SPI Data Register – SPDR

Bit

7

6

5

4

3

2

1

0

$0F ($2F)

MSB

LSB

SPDR

Read/Write

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Initial Value

X

X

X

X

X

X

X

X

Undefined

The SPI Data Register is a read/write register used for data transfer between the Regis-

ter File and the SPI Shift Register. Writing to the register initiates data transmission.

Reading the register causes the Shift Register Receive buffer to be read.

73

1457G–AVR–09/03

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