FDC37C672 View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
Manufacturer
FDC37C672 Datasheet PDF : 173 Pages
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Enhanced Super I/O Controller with Fast IR
Datasheet
PS/2 Model 30 Mode
7
6
nDRV2 nDS1
RESET N/A
1
COND.
5
nDS0
1
4
WDATA
F/F
0
3
RDATA
F/F
0
2
WGATE
F/F
0
1
nDS3
1
0
nDS2
1
BIT 0 nDRIVE SELECT 2
Active low status of the DS2 disk interface output.
BIT 1 nDRIVE SELECT 3
Active low status of the DS3 disk interface output.
BIT 2 WRITE GATE
Active high status of the latched WGATE output signal. This bit is latched by the active going edge of
WGATE and is cleared by the read of the DIR register.
BIT 3 READ DATA
Active high status of the latched RDATA output signal. This bit is latched by the inactive going edge of
RDATA and is cleared by the read of the DIR register.
BIT 4 WRITE DATA
Active high status of the latched WDATA output signal. This bit is latched by the inactive going edge of
WDATA and is cleared by the read of the DIR register. This bit is not gated with WGATE.
BIT 5 nDRIVE SELECT 0
Active low status of the DS0 disk interface output.
BIT 6 nDRIVE SELECT 1
Active low status of the DS1 disk interface output.
BIT 7 nDRV2
Active low status of the DRV2 disk interface input.
SMSC FDC37C672
Page 22
DATASHEET
Rev. 10-29-03
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