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FDC37C672 View Datasheet(PDF) - SMSC -> Microchip

Part Name
Description
Manufacturer
FDC37C672
SMSC
SMSC -> Microchip 
FDC37C672 Datasheet PDF : 173 Pages
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Enhanced Super I/O Controller with Fast IR
Datasheet
Bit 7
X
X
X
1
0
Table 6.5 - Internal 2 Drive Decode - Drives 0 and 1 Swapped
DIGITAL OUTPUT REGISTER
Bit 6 Bit 5 Bit 4 Bit1 Bit 0
X
X
1
0
0
X
1
X
0
1
1
X
X
1
0
X
X
X
1
1
0
0
0
X
X
DRIVE SELECT OUTPUTS
(ACTIVE LOW)
nDS1
nDS0
0
1
1
0
1
1
1
1
1
1
MOTOR ON OUTPUTS
(ACTIVE LOW)
nMTR1
nMTR0
nBIT 4
nBIT 5
nBIT 4
nBIT 5
nBIT 4
nBIT 5
nBIT 4
nBIT 5
nBIT 4
nBIT 5
Normal Floppy Mode
Normal mode. Register 3F3 contains only bits 0 and 1. When this register is read, bits 2 - 7 are a high
impedance.
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
REG 3F3 Tri-state Tri-state Tri-state Tri-state Tri-state Tri-state tape sel1 tape sel0
Enhanced Floppy Mode 2 (OS2)
Register 3F3 for Enhanced Floppy Mode 2 operation.
REG 3F3
DB7
Media
ID1
DB6
Media
ID0
DB5
DB4
Drive Type ID
DB3
DB2
DB1
DB0
Floppy Boot Drive tape sel1 tape sel0
Note:
For this mode, MEDIA_ID[1:0] pins are gated into bits 6 and 7 of the 3F3 register. These two bits are not
affected by a hard or soft reset.
BIT 7 MEDIA ID 1 READ ONLY (Pin 19) (See Table 6.6)
BIT 6 MEDIA ID 0 READ ONLY (Pin 20) (See Table 6.7)
BITS 5 and 4 Drive Type ID - These bits reflect two of the bits of L0-CRF1. Which two bits these are
depends on the last drive selected in the Digital Output Register (3F2). (See Table 6.8)
BITS 3 and 2 Floppy Boot Drive - These bits reflect the value of L0-CRF1. Bit 3 = L0-CRF1-B7. Bit 2 =
L0-CRF1-B6.
Bits 1 and 0 - Tape Drive Select (READ/WRITE). Same as in Normal and Enhanced Floppy Mode 1.
L0-CRF1-B5 = Logical Device 0, Configuration Register F1, Bit 5
SMSC FDC37C672
Page 25
PRELIMINARY DATASHEET
Rev. 10-29-03

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