9 DC and AC parameters
M69KB096AB
Table 20. Clock Related AC Timings
Symbol Alt.
Parameter
fCLk
tKHKH
tR
tF
tKHKL
tKLKH
fCLk Clock frequency
tCLK Clock Period
tKHKL
Clock Rise Time
Clock Fall Time
tKP
Clock High to Clock Low
Clock Low to Clock High
104MHz
Min Max
104
9.62
1.6
80MHz
Unit
Min Max
80 MHz
12.5
ns
1.8 ns
3
4
ns
Table 21. Synchronous Burst Read AC Characteristics
Symbol Alt.
Parameter(1)
tAVQV
tLLQV
tKHQV1
tKHQV2
tGLQV
tEHEL(2)
tELEH(2)
tELTV
tLLTV
tELQV
tELKH
tKHAX
tKHBH
tKHWL
tKHEH
tKHLH
tKHQX
tEHQZ
tEHTZ(3)
tKHTX
tKHTV
tGHQZ(3)
tAA Address Valid to Output Valid (Fixed Latency)
tAADV Latch Enable Low to Output Valid (Fixed Latency)
tABA Burst to Read Access Time (Variable Latency)
tACLK Clock High to Output Delay
tBOE
Delay From Output Enable Low to Output Valid in
Burst mode
tCBPH
Chip Enable High between Subsequent Operations
in Full-Synchronous or NOR-Flash mode.
tCEM Chip Enable Pulse Width
tCEW
Chip Enable Low to WAIT Valid
Latch Enable Low to WAIT Valid
tCO Chip Enable Low to Output Valid
tCSP Chip Enable Low to Clock High
tHD Hold Time From Active Clock Edge
tHZ Chip Enable High to Output Hi-Z or WAIT Hi-Z
tKHTL Clock High to WAIT Valid
tOHZ Output Enable High to Output Hi-Z
104MHz
Min Max
70
70
35
7
20
5
4
1
7.5
70
3
2
8
7
8
80MHz
Unit
Min Max
70 ns
70 ns
46 ns
9
ns
20 ns
6
ns
4
µs
1
7.5 ns
70 ns
4
ns
2
ns
8
ns
9
ns
8
ns
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