M69KB096AB View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M69KB096AB

64 Mbit (4Mb x 16)/ 104MHz Clock Rate 1.8V Supply - Bare Die Burst PSRAM

STMicroelectronics 

9 DC and AC parameters

M69KB096AB

Figure 29. 4-Word Synchronous Burst Write AC Waveforms (Variable Latency Mode)

tKHKH

K

Addr.

L

tAVKH

tAVWL

tLLWL

tLLKH

LB/UB

VALID

ADDRESS

tKHAX

tKHLH

tBLKH

tKHBH

tKHLL

tELKH

tELEH

tEHEL

E

High

G

tWLKH

W

tKHWH

WAIT

D0-D15

tELTV

Hi-Z

Note 2

tDVKH

Hi-Z

WRITE Burst Identified

(W = Low)

tKHTX

VALID

INPUT

tKHDX

VALID

INPUT

tKHEH

VALID

INPUT

VALID

INPUT

tEHTZ

Hi-Z

ai11288

1. The Latency is set to 3 clock cycles (BCR13-BCR11 = 101). The WAIT signal is active Low (BCR10=0), and asserted

during delay (BCR8=0).

2. The WAIT signal must remain asserted for LC clock cycles (LC Latency code), whatever the Latency mode (fixed or

variable).

3. tAVLL and tLLWL, are required if tELKH> 20ns.

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