M69KB096AB View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M69KB096AB

64 Mbit (4Mb x 16)/ 104MHz Clock Rate 1.8V Supply - Bare Die Burst PSRAM

STMicroelectronics 

M69KB096AB

9 DC and AC parameters

Table 22. Synchronous Burst Write AC Characteristics

Symbol Alt.

Parameter(1)

104MHz

Min Max

80MHz

Unit

Min Max

tAVWL

tLLWL(2) tAS Address Set-up to Beginning of Write Operation

0

0

ns

tLHAX tAVH Latch Enable High to Address Transition (Fixed Latency) 2

2

ns

tEHEL(3)

tCBPH

Chip Enable High between Subsequent Operations in

Full-Synchronous or NOR-Flash mode.

5

6

ns

tELEH(3) tCEM Maximum Chip Enable Low Pulse

4

4 µs

tELTV

tLLTV

tCEW Chip Enable Low to WAIT Valid

1

7.5

1

7.5 ns

tELKH tCSP Chip Enable Low to Clock High

3

4

ns

tKHAX

tKHRL

tKHLH

tKHDX

tKHEH

tKHBH

tKHWH

tHD Hold Time From Active Clock Edge

2

2

ns

tKHLL

tKADV

Last Clock Rising Edge to Latch Enable Low (Fixed

Latency)

4

6

ns

tEHDZ

tEHTZ(4) tHZ Chip Enable High to Input Hi-Z or WAIT Hi-Z

8

8 ns

tKHTV

tKHTX

tKHTL Clock High to WAIT Valid or Low

7

9 ns

tAVKH

tDVKH

tWLKH

tLLKH

tBLKH

tWHKH

tWHWL

tSP Set-up Time to Active Clock Edge

3

3

ns

1. These timings have been obtained in the measurement conditions described in Table 14: Operating and AC Measurement

Conditions and Figure 13: AC Measurement Load Circuit.

2. tAVWL and tLLWL, are required if tELKH> 20ns.

3. A refresh opportunity must be offered every tELEH. A refresh opportunity is possible either if E is High during the rising edge

of K; or if E is High for longer than 15ns.

4. The Hi-Z timings measure a 100mV transition from either VOH or VOL to VCCQ/2.

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