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PIC16F1513T-I/SS View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC16F1513T-I/SS
Microchip
Microchip Technology 
PIC16F1513T-I/SS Datasheet PDF : 360 Pages
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PIC16(L)F1512/3
FIGURE 16-9:
VDD
DIFFERENTIAL CVD WITH GUARD RING OUTPUT WAVEFORM
Guard Ring Output
VSS
First Sample
Second Sample
Time
16.6.8 ADDITIONAL SAMPLE AND HOLD
CAPACITOR
Additional capacitance can be added in parallel with the
sample and hold capacitor (CHOLD) by setting the
ADDCAP<2:0> bits of the AADCAP register. This bit
connects a digitally programmable capacitance to the
ADC conversion bus, increasing the effective internal
capacitance of the sample and hold capacitor in the
ADC module. This is used to improve the match
between internal and external capacitance for a better
sensing performance. The additional capacitance does
not affect analog performance of the ADC because it is
not connected during conversion. See Figure 16-6.
16.6.9 ANALOG BUS VISIBILITY
The ADOEN bit or the ADOLEN bit of the AADCON3
register can be used to connect the ADC conversion bus
(CHOLD) to the ADOUT pin. This connection can be used
to monitor the state and behavior of the internal analog
bus and it also can be used to improve the match
between internal and external capacitance by connecting
a external capacitor to increase the effective internal
capacitance. The ADOEN bit provides the connection via
a standard channel passgate, while the ADOLEN bit
enables a lower-impedance passgate.
The ADOUT pin function can be overridden during the
pre-charge stage of conversion. This override function
is controlled by the ADOOEN bit. The polarity of the
override is set by the ADIPPOL bit. It should be noted
that, outside of the pre-charge phase, no ADOUT
override is in effect. Therefore, the user must manage
the state of the ADOUT pin via the relevant TRIS bit in
order to avoid unintended affects on conversion
results. If the user wishes to have the ADOUT path be
active during conversions, then the relevant TRIS bit
should be set to ensure that the ADOUT pin logic is in
the input mode during the acquisition phase of
conversions.
2012-2014 Microchip Technology Inc.
DS40001624C-page 141

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