PIC16(L)F1512/3
16.6.11 HARDWARE CVD REGISTER
MAPPING
The hardware CVD module is an enhanced expansion
of the standard ADC module as stated in Section 16.0
“Analog-to-Digital Converter (ADC) Module” and is
backward compatible with the other devices in this fam-
ily. Control of the standard ADC module uses Bank 1
registers, see Table 16-4. This set of registers is
mapped into Bank 14 with the control registers for the
hardware CVD module. Although this subset of regis-
ters has different names, they are identical. Since the
registers for the standard ADC are mapped into the
Bank 14 address space, any changes to registers in
Bank 1 will be reflected in Bank 14 and vice-versa.
TABLE 16-4: HARDWARE CVD REGISTER
MAPPING
[Bank 14 Address]
[Bank 1 Address]
Hardware CVD
ADC
[711h] AADCON0(1)
[712h] AADCON1(1)
[09Dh] ADCON0(1)
[09Eh] ADCON1(1)
[713h] AADCON2
[714h] AADCON3
[715h] AADSTAT
[716h] AADPRE
[717h] AADACQ
[718h] AADGRD
[719h] AADCAP
[71Ah] AADRES0L(1)
[71Bh] AADRES0H(1)
[09Bh] ADRES0L(1)
[09Ch] ADRES0H(1)
[71Ch] AADRES1L
[71Dh] AADRES1H
Note 1: Register is mapped in Bank 1 and Bank
14, using different names in each bank.
DS40001624C-page 146
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