PIC16F636T-I/SL(2005) View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F636T-I/SL
(Rev.:2005)

8/14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

Microchip Technology 

PIC12F635/PIC16F636/639

TABLE 15-3: CLKOUT AND I/O TIMING REQUIREMENTS

Param

No.

Sym

Characteristic

Min

Typ†

10

TOSH2CKL OSC1↑ to CLKOUT↓

—

75

11

TOSH2CKH OSC1↑ to CLKOUT↑

—

75

12

TCKR

CLKOUT Rise Time

—

35

13

TCKF

CLKOUT Fall Time

—

35

14

TCKL2IOV CLKOUT↓ to Port Out Valid

—

—

15

TIOV2CKH Port In Valid before CLKOUT↑

TOSC + 200 ns —

16

TCKH2IOI

Port In Hold after CLKOUT↑

0

—

17

TOSH2IOV OSC1↑ (Q1 cycle) to Port Out Valid

—

50

—

—

18

TOSH2IOI

OSC1↑ (Q2 cycle) to Port Input

Invalid (I/O in hold time)

100

—

19

TIOV2OSH Port Input Valid to OSC1↑

(I/O in setup time)

0

—

20

TIOR

Port Output Rise Time

—

10

21

TIOF

Port Output Fall Time

—

10

22

TINP

INT pin High or Low Time

25

—

23

TRBP

PORTA Change INT High or Low

Time

TCY

—

* These parameters are characterized but not tested.

† Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated.

Note 1: Measurements are taken in RC mode where CLKOUT output is 4 x TOSC.

Max

200

200

100

100

20

—

—

150*

300

—

—

40

40

—

—

Units Conditions

ns (Note 1)

ns (Note 1)

ns (Note 1)

ns (Note 1)

ns (Note 1)

ns (Note 1)

ns (Note 1)

ns

ns

ns

ns

ns

ns

ns

ns

FIGURE 15-6:

RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND

POWER-UP TIMER TIMING

VDD

MCLR

Internal

POR

PWRT

Time-out

OSC

Time-out

Internal

Reset

Watchdog

Timer

Reset

I/O pins

33

32

30

31

34

34

DS41232B-page 164

Preliminary

© 2005 Microchip Technology Inc.

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