PIC12F635/PIC16F636/639
FIGURE 15-8:
TIMER0 AND TIMER1 EXTERNAL CLOCK TIMINGS
T0CKI
40
41
42
T1CKI
TMR0 or
TMR1
45
46
47
48
TABLE 15-5: TIMER0 AND TIMER1 EXTERNAL CLOCK REQUIREMENTS
Param
No.
Sym
Characteristic
Min
Typ† Max Units Conditions
40* TT0H
T0CKI High Pulse Width
No Prescaler
0.5 TCY + 20 —
—
ns
With Prescaler
10
—
—
ns
41* TT0L
T0CKI Low Pulse Width
No Prescaler
0.5 TCY + 20 —
—
ns
With Prescaler
10
—
—
ns
42* TT0P
T0CKI Period
Greater of:
—
—
ns N = prescale
20 or TCY + 40
value (2, 4,...,
N
256)
45* TT1H
T1CKI High
Time
Synchronous, No Prescaler
Synchronous, with Prescaler
0.5 TCY + 20 —
—
ns
15
—
—
ns
Asynchronous
30
—
—
ns
46* TT1L
T1CKI Low Time Synchronous, No Prescaler
0.5 TCY + 20 —
—
ns
Synchronous, with Prescaler
15
—
—
ns
Asynchronous
30
—
—
ns
47* TT1P
T1CKI Input
Period
Synchronous
Greater of:
—
—
ns N = prescale
30 or TCY + 40
value (1, 2, 4, 8)
N
Asynchronous
60
—
—
ns
48
FT1
Timer1 Oscillator Input Frequency Range
(oscillator enabled by setting bit T1OSCEN)
DC
— 200* kHz
49
TCKEZTMR1 Delay from External Clock Edge to Timer
increment
2 TOSC*
— 7 TOSC* —
* These parameters are characterized but not tested.
† Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
DS41232B-page 166
Preliminary
© 2005 Microchip Technology Inc.