Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip Data Sheet
Note:
Table 180.
RCK1BP
RCK2AN
RCK2AP
RCK2BN
RCK2BP
RCK3AN
RCK3AP
RCK3BN
RCK3BP
RCK4AN
RCK4AP
RCK4BN
RCK4BP
FM2112 High-Speed Clock Signal Pins (Continued)
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
CML (1)
LVDS
LVPECL
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Differential Reference Clock B for Ports 1, 3, 5,
7, 9, 11
True
Differential Reference Clock A for Ports 2, 4, 6,
8, 10, 12
Complement
Differential Reference Clock A for Ports 2, 4, 6,
8, 10, 12 True
Differential Reference Clock B for Ports 2, 4, 6,
8, 10, 12 Complement
Differential Reference Clock B for Ports 2, 4, 6,
8, 10, 12 True
Differential Reference Clock
A for Ports 13, 15, 17, 19, 21, 23
Complement
Differential Reference Clock
A for Ports 13, 15, 17, 19, 21, 23
True
Differential Reference Clock
B for Ports 13, 15, 17, 19, 21, 23
Complement
Differential Reference Clock
B for Ports 13, 15, 17, 19, 21, 23
True
Differential Reference Clock A for Ports 14, 16,
18, 20, 22, 24
Complement
Differential Reference Clock A for Ports 14, 16,
18, 20, 22, 24
True
Differential Reference Clock B for Ports 14, 16,
18, 20, 22, 24
Complement
Differential Reference Clock B for Ports 14, 16,
18, 20, 22, 24
True
These pins are AC coupled and are compatible with the stated IO. For LVDS IO a 2K
resistor is required between the lines on the driver side of the isolation capacitors
143