FBFM2112F897CSLJLS View Datasheet(PDF) - Intel
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FBFM2112F897CSLJLS Datasheet PDF : 169 Pages
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Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip Data Sheet
6.4.2.1
6.4.2.2
6.4.3
Recommended Filtering
The power supply should be filtered both at the source of the power
supply and local to the power supply balls on the FM2112. The power
balls have been designed to take advantage of the space on the inside
of the signal pins on the back side of the board for this purpose.
Note Consult the FM2112 Design and Layout Guide (Intel® document
number: FM2112 DG) for specific information on filtering strategies.
Power Supply Sequencing
The FM2112 TTL I/Os use the 3.3V supply, but the internal logic in the
switch contolling those I/Os uses the VDD supply. If the 3.3V is present
on the part and the VDD is not, then the I/Os are in an unpredictable
state. As an example, if a processor is attached to the FM2112 via the
CPU bus and to a boot ROM on the same bus, then the fact that the
FM2112 I/Os could be in an unknown state (if VDD is not present) may
cause a boot problem. To solve this problem, ensure that VDD is
applied before a general master reset is de-asserted to the main
processor as this will ensure that the TTL I/Os are in a correct state.
Another way to solve this problem would be to use tri-state buffers on
the EBI bus.
The correct power sequencing is:
• Apply power to all components, including the switch
• De-assert master reset on board
• Optional de-assert reset on the switch (but not required at this stage)
• Processor boots (if processor present)
• Processor de-assert reset on the switch (if not done)
— EBI clock must be present on the switch before the reset is deasserted (10
cycles good enough).
Ball Assignment
Table 189. Package Ball Assignment in Numerical Order
Pkg
Ball
A1
A2
A3
A4
A5
A6
A7
A8
Signal Name
P14_TAP
VSS
P08_TDP
VSS
P08_TCP
VSS
P08_TBP
VSS
Pkg
Ball
L16
L17
L18
L19
L20
L21
L22
L23
Signal Name
VDD
VDD
VSS
VSS
VSS
VSS
VSS
TESTMODE
Pkg
Ball
AA31
AB1
AB2
AB3
AB4
AB5
AB6
AB7
Signal Name
DATA[26]
VSS
VDDX
VDDA
VDDX
VSS
VSS
P11_RAN
148
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