FBFM2112F897CSLJLS View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

FBFM2112F897CSLJLS

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip

Intel 

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip Data Sheet

— ST FLASH and EEPROM

— ATMEL FLASH

— Fairchild EEPROM

— AKM EEPROM

— MicroChip EEPROM

Table 15. SPI External Interface Pin List

Signal Name

SPI_SO

SPI_CS_N

SPI_SCK

SPI_SI

Signal Direction

OUT

OUT

OUT

IN

Signal Description

Serial Data Output (MOSI, Master-Out- Slave-In, since

FM2112 is master). Connect to EEPROM serial data

input

SPI Chip Select (Active Low)

CLOCK for SPI interafce.

Serial Data Input (MISO, Master-In-Slave-Out, since

FM2112 is master). Connect to EEPROM serial data

output.

A SPI transaction is shown in Figure 19 and described below:

• Activate SPI_CS_N and assert first data bit

• On the negative edge the clock, send the following bit stream - MSB first

— Send instruction - 8'h3 (I[7:0])

— Send 3 bytes of address (A[23:0])

• On the positive edge of the clock, receive each bit of data. This will continue until

BOOT FSM asserts

• De-activate SPI_CS_N, Tri-state SPI_SO.

3.5.5

Figure 19. SPI Timing Diagram

LED Interface

The LED interface consists of 4 signals, CLK, DATA0, DATA1, DATA2,

and ENABLE, which transmits 3 bits of status data for the LED per port

over the time multiplexed data pins. The 3 bits of status of ports 0-8

are placed onto Data0 and the 3 bits of status on ports 9-16 are placed

onto Data1 and the 3 bits of status of ports 17-24 are placed onto

Data2.

There are two modes of operation.

Mode=0: This mode selects operations compatible to devices such as

the SGS Thompson M5450 LED display drive type device. Data polarity

is non-inverted.

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