Register Access Methods—Intel® Quark SoC X1000
5.0
Register Access Methods
5.1
Table 40.
There are six different common register access methods:
• Fixed I/O
• Fixed Memory
• I/O Referenced
• Memory Referenced
• PCI Configuration (Indirect - via Memory or I/O registers)
• Message Bus (Indirect - via PCI Configuration Registers)
Fixed I/O Register Access
Fixed I/O registers are accessed by specifying their 16-bit address in a PORT IN and/or
PORT OUT transaction from the CPU core. This allows direct manipulation of the
registers. Fixed I/O registers are unmovable registers in I/O space.
Fixed I/O Register Access Method Example (NSC Register)
Type: I/O Register
(Size: 8 bits)
NSC: 61h
5.2
Table 41.
Fixed Memory Mapped Register Access
Fixed Memory Mapped I/O (MMIO) registers are accessed by specifying their 32-bit
address in a memory transaction from the CPU core. This allows direct manipulation of
the registers. Fixed MMIO registers are unmovable registers in memory space.
Fixed Memory Mapped Register Access Method Example (IDX Register)
Type: Memory Mapped I/O Register
(Size: 32 bits)
IDX: FEC00000h
5.3
I/O Referenced Register Access
I/O referenced registers use programmable base address registers (BARs) to select a
range of I/O addresses that it uses to decode PORT IN and/or PORT OUT transactions
from the CPU to directly access a register. Thus, the I/O BARs act as pointers to blocks
of actual I/O registers. To access an I/O referenced register for a specific I/O base
address, start with that base address and add the register’s offset. Example
pseudocode for an I/O referenced register read is shown below:
Register_Snapshot = IOREAD([IO_BAR]+Register_Offset)
Base address registers are often located in the PCI configuration space and are
programmable by the BIOS/OS. Other base address register types may include fixed
memory registers, fixed I/O registers or message bus registers.
October 2013
Document Number: 329676-001US
Intel® Quark SoC X1000
DS
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