DHQ1ECCSECETS1SR1WH View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

DHQ1ECCSECETS1SR1WH

Intel® Quark SoC X1000

Intel 

Register Access Methods—Intel® Quark SoC X1000

Table 45.

Note:

5.5.2

Table 46.

Note:

the register pointed to in CONFIG_ADDRESS. Accesses to CONFIG_ADDRESS (CF8h)

are internally captured. Upon a read or write access to CONFIG_DATA (CFCh),

configuration cycles are generated to the PCI function specified by the address

captured in CONFIG_ADDRESS. The format of the address is shown in Table 45.

PCI CONFIG_ADDRESS Register (I/O PORT CF8h) Mapping

Field

Enable PCI Config. Space Mapping

Reserved

Bus Number

Device Number

Function Number

Register/Offset Number

CONFIG_ADDRESS Bits

31

30:24

23:16

15:11

10:08

07:02

Bit 31 of CONFIG_ADDRESS must be set for a configuration cycle to be generated.

Pseudocode for a PCI register read is shown below:

MyCfgAddr[23:16] = bus; MyCfgAddr[15:11] = device; MyCfgAddr[10:8] = funct;

MyCfgAddr[7:2] = dWordMask(offset); MyCfgAddr[31] = 1;

IOWRITE(0xCF8, MyCfgAddr)

Register_Snapshot = IOREAD(0xCFC)

PCI Configuration Access - ECAM: Memory Mapped Scheme

A flat, 256 Mbyte memory space may also be allocated to perform configuration

transactions. This is enabled through the HECREG message bus register (Port: 3h,

Register: 09h) found in the Host Bridge. HECREG allows remapping this 256 Mbyte

region anywhere in physical memory space. Memory accesses within the programmed

MMIO range result in configuration cycles to the appropriate PCI devices specified by

the memory address as shown below.

PCI Configuration Memory Bar Mapping

ECAM Memory Address Field

Use from BAR: HECREG[31:28]

Bus Number

Device Number

Function Number

Register Number

ECAM Memory Address Bits

31:28

27:20

19:15

14:12

11:02

ECAM accesses are only possible when HECREG.EC_ENABLE (bit 0) is set.

Pseudocode for an enhanced PCI configuration register read is shown below:

MyCfgAddr[27:20] = bus; MyCfgAddr[19:15] = device; MyCfgAddr[14:12] = funct;

MyCfgAddr[11:2] = dw_offset; MyCfgAddr[31:28] = HECREG[31:28];

Register_Snapshot = MEMREAD(MyCfgAddr)

October 2013

Document Number: 329676-001US

Intel® Quark SoC X1000

DS

85

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