T2080NXE8MQLB View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
T2080NXE8MQLB Datasheet PDF : 186 Pages
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Electrical characteristics
Table 2. Absolute maximum ratings1 (continued)
Characteristic
Symbol
Max Value
-0.3 to 1.98
Unit Note
s
DDR3 and DDR3L DRAM I/O voltage
G1VDD
-0.3 to 1.65
-0.3 to 1.45
V—
Main power supply for internal circuitry of SerDes and pad power SnVDD
supply for SerDes receivers
-0.3 to 1.1
V—
Pad power supply for SerDes transmitters
Ethernet I/O, Ethernet management interface 1 (EMI1) 1588,
GPIO I/O voltage
XnVDD
LVDD
-0.3 to 1.45
-0.3 to 2.75
-0.3 to 1.98
V
V—
Ethernet management interface 2 (EMI2) I/O voltage
—
-0.3 to 1.32
V4
USB PHY Transceiver supply voltage
USB PHY Analog supply voltage
Low Power Security Monitor supply
Input voltage
DDR3 and DDR3L DRAM signals
DDR3 and DDR3L DRAM reference
USB_HVDD
USB_OVDD
USB_SVDD
VDD_LP
MVIN
D1_MVREF
-0.3 to 3.63
V—
-0.3 to 1.98
V—
-0.3 to 1.1
V—
-0.3 to 1.1
V—
-0.3 to (GVDD + 0.3) V 5
-0.3 to (GVDD/2+
V
6
0.3)
Ethernet signals (except EMI2)
eSHDC, MPIC, GPIO, system control and
power management, clocking, debug, IFC,
DDRCLK supply, and JTAG signals
LVIN
OVIN
-0.3 to (LVDD + 0.3) V 6, 7
-0.3 to (OVDD + 0.3) V 6, 8
eSPI
DMA, DUART, I2C signals
SerDes signals
USB PHY Transceiver signals
CVIN
DVIN
SVIN
USB_HVIN
-0.3 to (CVDD + 0.3) V 6, 8
-0.3 to (DVDD + 0.3) V 8, 9
-0.4 to (SVDD + 0.3) V 6
-0.3 to (USB_HVDD V 6
+ 0.3)
USB_OVIN
-0.3 to (USB_OVDD V 6
+ 0.3)
Ethernet management interface 2 signals
-
-0.3 to (1.2 + 0.3) V —
Storage temperature range
Notes:
TSTG
-55 to 150
°C —
1. Functional operating conditions are given in Table 3. Absolute maximum ratings are stress ratings only, and functional
operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause permanent
damage to the device.
2. Supply voltage specified at the voltage sense pin. Voltage input pins should be regulated to provide specified voltage at the
sense pin.
4. Ethernet MII management interface 2 pins function as open drain I/Os. The interface shall conform to 1.2 V nominal
voltage levels.
5. Caution: MVIN must not exceed GVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during
power-on reset and power-down sequences.
6. (C, S,G,L,O,D)VIN, USBn_VIN_3P3, USBn_VIN_1P8 and D1_MVREF may overshoot/undershoot to a voltage and for a
maximum duration as shown in Figure 7.
QorIQ T2080 Data Sheet, Rev. 3, 03/2018
44
NXP Semiconductors
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