ADSP-BF518KSWZ-ENG View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADSP-BF518KSWZ-ENG

Blackfin Embedded Processor

Analog Devices 

Preliminary Technical Data

ADSP-BF512/BF514/BF516/BF518 (F)

Asynchronous Memory Write Cycle Timing

Table 21. Asynchronous Memory Write Cycle Timing

Parameter

Timing Requirements

tSARDY

ARDY Setup Before CLKOUT

tHARDY

ARDY Hold After CLKOUT

Switching Characteristics

tDDAT

tENDAT

tDO

tHO

DATA15–0 Disable After CLKOUT

DATA15–0 Enable After CLKOUT

Output Delay After CLKOUT1

Output Hold After CLKOUT 1

1 Output pins/balls include AMS3–0, ABE1–0, ADDR19–1, DATA15–0, AOE, AWE.

Min

Max

Unit

4.0

ns

0.0

ns

6.0

ns

1.0

ns

6.0

ns

0.8

ns

SETUP

2 CYCLES

ACCESS

PROGRAMMED WRITE EXTENDED HOLD

ACCESS 2 CYCLES 1 CYCLE 1 CYCLE

CLKOUT

t DO

tHO

AMSx

ABE1–0

ADDR19–1

AWE

ARDY

DATA15–0

ABE, ADDRESS

tDO

t SARDY

tHO

tHARDY

t ENDAT

WRITE DATA

tSARDY

tDDAT

Figure 9. Asynchronous Memory Write Cycle Timing

Rev. PrE | Page 29 of 62 | March 2009

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