STLC5464 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STLC5464

MULTI-HDLC WITH n x 64 SWITCHING MATRIX ASSOCIATED

STMicroelectronics 

STLC5464

VII - MICROPROCESSOR TIMING (continued)

VII.5 - Token Ring Timing

Figure 43 : Token Ring

1/f

MASTER CLOCK

(applied to XTAL1 P in)

a

TRO

TRI

a

tS

Symbol

1/f

a

tS

tH

Parameter

f : Masterclock frequency

Delay between Masterclock Rising Edge and Edges of TRO Pulse

delivered by the MHDLC (10pF)

Set-up Time TRI/Masterclock Masterclock Falling Edge

Hold Time TRI/Masterclock Falling Edge

VII.6 - Master Clock Timing

Figure 44 : Master Clock

MASTER CLOCK

(applied to XTAL1 Pin)

1/f

tH

tL

Symbol

f

1/f

tH

tL

Masterclock Frequency

Masterclock Period

Masterclock High

Masterclock Low

Parameter

tH

Min.

Typ.

32.768

Max.

25

5

5

0

Unit

MHz

ns

ns

ns

Min.

30

30.3

12

12

Typ.

32.768

30.5

Max.

33

33.3

Unit

MHz

ns

ns

ns

54/83

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