STLC5464 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STLC5464

MULTI-HDLC WITH n x 64 SWITCHING MATRIX ASSOCIATED

STMicroelectronics 

STLC5464

VIII - INTERNAL REGISTERS

‘Not used’ bits (Nu) are accessible by the microprocessor but the use of these bits by software is not

recommended.

‘Reserved’ bits are not implemented in the circuit. However, it is not recommended to use this address.

VIII.1 - Identification and Dynamic Command Register - IDCR (00)H

bit15

bit8 bit7

bit 0

C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 C0

When this register is read by the microprocessor, the circuit code C0/15 is returned. Reset has no effect

on this register.

C0/3 indicates the version.

C4/7 indicates the revision.

C8/11 indicates the foundry.

C12/15 indicates the type.

Example : this code is (0010)H for the first sample.

When this register is written by the microprocessor then :

bit15

bit8 bit7

bit 0

Nu Nu Nu Nu Nu Nu Nu Nu Nu Nu Nu Nu Nu RSS WDR TL

TL : TOKEN LAUNCH

When TL is set to 1 by the microprocessor, the token pulse is launched from the TRO pin (Token

Ring Output pin). This pulse is provided to the TRI pin (Token Ring Input pin) of the next circuit

in the applications where several Multi-HDLCs are connected to the same shared memory.

WDR : WATCHDOG RESET.

When the bit 1 (WDR) of this register is set to 1 by the microprocessor, the watchdog counter is

reset.

RSS : RESET SOFTWARE

When the bit 2 (RSS) of this register is set to 1 by the microprocessor, the circuit is reset (Same

action as reset pin).

After writing this register, the values of these three bits return to the default value.

VIII.2 - General Configuration - GCR (02)H

bit15

bit8 bit7

bit 0

Nu MBL AFAB SCL BSEL SELB CSD HCL SYN1 SYN0 D7 EVM TSV TRD PMA WDD

After reset (0000)H

WDD

PMA

TRD

: Watch Dog Disable

WDD = 1, the Watch Dog is masked : WDO pin stays at ”0”.

WDD = 0, the Watch Dog generates an ”1” on WDO pin if the microprocessor has not reset the

Watch Dog during the duration programmed in Timer Register.

: Priority Memory Access

PMA = 1, if the token ring has been launched it is captured and kept in order to authorize

memory accesses.

PMA = 0, memory is accessible only if the token is present; after one memory access the token

is re-launched from TRO pin of the current circuit to TRI pin of the next circuit.

: Token Ring Disable

TRD = 1, if the token has been launched, the token ring is stopped and destroyed ; memory

accesses are not possible. The token will not appear on TRO pin.

TRD = 0, the token ring is authorized ; when the token will be launched,it will appearon TRO pin.

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