STLC5464 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STLC5464

MULTI-HDLC WITH n x 64 SWITCHING MATRIX ASSOCIATED

STMicroelectronics 

V - CLOCK TIMING (continued)

V.4 - V* Interface

Figure 30 : V* Synchronization Signal delivered by the Multi-HDLC

FS re ce ived by

th e Multi-HDLC

CH0

DIN4/5

DOUT4/5

125µs

CH1

STLC5464

C H7

GCI Channel

B1

B2

MON D C/I AT

DCLK de livere d by

th e Multi-HDLC

FSCV* de live re d by

th e Multi-HDLC

DOUT0/7, CB

if FSCG is conne cte d to FS

DIN0/8

t1

t3

t3

Bit 3, Time S lot 31

t7

t7

Th e four Multiple x Configura tion Re giste rs a re a t z e ro (no de la y be twe e n FS a nd Multiple xe s ).

Symbol

t1

t3

t5

t6

t7

t7

Clock Period 4096kHz

DCLK to FSCV*

Duration FSCV*

Clock to Data 50pF

Clock to Data 100pF

Set-up Time Data/DCLK

Hold Time Data/DCLK

Parameter

Min.

20

20

Typ.

244

244

Max.

20

50

100

Unit

ns

ns

ns

ns

nS

ns

ns

41/83

Share Link: