STLC5464 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STLC5464 Datasheet PDF : 83 Pages
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STLC5464
VII - MICROPROCESSOR TIMING (continued)
VII.3 - 80C186 MOD0=1, MOD1=1, MOD2=1
Figure 39 : 80C186 Read Cycle
NCS0/1
t1
READY
NAS/ALE
t3
t4
NDS/NRD
AD0/15
R/W / NWR
NBHE A16/19
t12
t5
t6
A0/15
t9
t10
NBHE
A16/19
Symbol
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
Parameter
Delay Ready / Chip Select (if t3 > t1), (30pF)
Hold Time Chip Select / NRD
Delay Ready / ALE (if t1 > t3), (30pF)
Width ALE
Set-up Time Address / ALE
Hold Time Address / ALE
Data Valid before Ready
Data Valid after NRD (30pF)
Set-up Time NBHE-Address A16/19 / ALE
Hold Time Address A1619 / NRD
Hold Time NBHE- / NRD
Delay NRD / NCS
t2
t7
t8
D0/15
t11
NBHE
Min.
0
10
0
20
5
5
-15
0
5
10
10
0
Typ.
Max.
20
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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