VII - MICROPROCESSOR TIMING (continued)
Figure 36 : ST9 Write Cycle
NCS0/1
t1
READY
t3
NAS/ALE
t4
t12
NDS/NRD
AD0/7
t7
t5
t6
A0/7
t9
R/W / NWR
Symbol
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
Parameter
Delay Ready / Chip Select (if t3 > t1), (30pF)
Hold Time Chip Select / Data Strobe
Delay Ready / NAS (if t1 > t3), (30pF)
Width NAS
Set-up Time Address / NAS
Hold Time Address / NAS
Set-up Time Data / Data Strobe
Hold Time Data / Data Strobe
Set-up Time R/W / NAS
Hold Time R/W / Data Strobe
Width NDS when immediate access
Delay NDS / NCS
STLC5464
t2
t11
t8
D0/7
t10
Min.
0
14
0
20
9
9
-15
15
15
15
50
5
Typ.
Max.
30
30
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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