CL-PS7500FE View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

All defined bits are cleared on reset, except bits 8, 10, and 11 (DA, AB, and SB) which are set.

Apart from by using the WFC instruction, the AB bit can only be set by the arithmetic unit and the SB bit

can only be set by the load-store unit.

Only the arithmetic unit can write bits 31, 28:26, 23:12, 9, 7:0 of the FPCR.

The behavior of the FPCR when the RFC and WFC instructions are executed is as follows:

q A read of the FPCR by RFC clears the SB, AB and DA bits of the FPCR, and leaves the other bits of the

FPCR unchanged.

q A write of the FPCR by WFC writes the SB, AB, & DA bits of the FPCR, and leaves the other bits of the FPCR

unchanged.

NOTE: This information about the FPCR in the FPA is only supplied to aid with modifications to the FPA support

code. Using it for any other purpose is likely to lead to compatibility problems and is strongly discouraged.

June 1997

ADVANCE DATA BOOK v2.0

FLOATING-POINT COPROCESSOR PROGRAMMER’S

MODEL

169

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