CL-PS7500FE View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

10.3 Register Descriptions

10.3.1

IOCR (0x00) — I/O Control

76543210

FN1 1 I 1CD

This register controls various I/O functions. The value of the FLYBACK signal from the video subsystem

can be examined by reading bit 7 of this register, this is important for GENLOCK as FLYBACK provides

information about the vertical timing of the display. The FLYBACK bit also gives information about when

the video palette registers can safely be reprogrammed without causing any visual effects. This can only

be done during the FLYBACK period, when this bit is set high. Control of the open drain OD[1:0] and ID

pins is provided from this register. It is also possible to read the status of the nINT1 pin.

F

FLYBACK value

N

nINT1 value

I

ID open drain pin control

C

OD[1] open drain pin control

D

OD[0] open drain pin control

Write

bits[7:4, 2] ignored

bit[3, 1:0] open drain pin controls:

0

force pin low

1

pin is input only

Read

bit[7] reads current FLYBACK value from video and sound macrocell

bit[6] reads current nINT1 pin value

bits[5:4, 2] read one

bit[3] reads current ID pin value

bit[1] reads current OD[1] pin value

bit[0] reads current OD[0] pin value

Reset

bits[3, 1:0] set as inputs (high)

10.3.2

KBDDAT (0x04) — Keyboard Data

76543210

DDDDDDDD

D

Write

Read

keyboard data

next byte to be sent over serial interface to keyboard

last byte of data received from keyboard

June 1997

ADVANCE DATA BOOK v2.0

81

MEMORY AND I/O PROGRAMMERS’ MODEL

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