OR2T15B7BA352-DB View Datasheet(PDF) - Lattice Semiconductor
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OR2T15B7BA352-DB Datasheet PDF : 200 Pages
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Data Sheet
November 2006
ORCA Series 2 FPGAs
Package Thermal Characteristics (continued)
FPGA Maximum Junction Temperature
Once the power dissipated by the FPGA has been determined (see the Estimating Power Dissipation section), the
maximum junction temperature of the FPGA can be found. This is needed to determine if speed derating of the
device from the 85 °C junction temperature used in all of the delay tables is needed. Using the maximum ambient
temperature, TAmax, and the power dissipated by the device, Q (expressed in °C), the maximum junction tempera-
ture is approximated by:
S TJmax = TAmax + (Q • ΘJA)
Table 29 lists the thermal characteristics for all packages used with the Series 2 FPGAs.
E Table 29. Series 2 Plastic Package Thermal Guidelines
IC Package
D 84-Pin PLCC1
V 100-Pin TQFP2
E 144-Pin TQFP1
160-Pin QFP2
E U 208-Pin SQFP2
208-Pin SQFP22
240-Pin SQFP2
D IN 240-Pin SQFP22
256-Pin PBGA2, 3
256-Pin PBGA2, 4
T T 304-Pin SQFP2
304-Pin SQFP22
C 352-Pin PBGA2, 3
N 352-Pin PBGA2, 4
432-Pin EBGA2
0 fpm
ΘJA (°C/W)
200 fpm
500 fpm
40.0
30.0—27.0
52.0
24.0
26.5
12.8
25.5
13.0
22.5
26.0
27.5
12.0
19.0
25.5
11.0
35.0
26—23
39.0
21.5
23.0
10.3
22.5
10.0
19.0
22.0
24.0
10.0
16.0
22.0
8.5
—
24.0—21.0
—
20.5
21.0
9.1
21.0
9.0
17.5
20.5
22.5
9.0
15.0
20.5
7.5
TA = 70 °C max
TJ = 125 °C max
@ 0 fpm (W)
1.4
1.8—2.0
1.1
2.3
2.1
4.3
2.2
4.2
2.4
2.1
2.0
4.6
2.9
2.1
5.0
E 1. Mounted on a sparse copper one-layer test board.
O 2. Mounted on four-layer JEDEC standard test board with two power/ground planes.
3. With thermal balls connected to board ground plane.
L 4. Without thermal balls connected to board ground plane.
E C Note: The ψJC for the packages listed is <1 °C/W. This implies that virtually all of the heat is dissipated through the board on which the package
is mounted.
S IS Package Coplanarity
The coplanarity limits of the Series 2 series packages
D are as follows:
Package Parasitics
The electrical performance of an IC package, such as
signal quality and noise sensitivity, is directly affected
â– TQFP: 3.15 mils
â– PLCC and QFP: 4.0 mils
â– PBGA: 8.0 mils
by the package parasitics. Table 30 lists eight parasitics
associated with the ORCA packages. These parasitics
represent the contributions of all components of a
package, which include the bond wires, all internal
â– SQFP: 4.0 mils (240 and 304 only)
package routing, and the external leads.
3.15 mils (all other sizes)
â– SQFP2: 3.15 mils
Four inductances in nH are listed: LSW and LSL, the
self-inductance of the lead; and LMW and LML, the
â– EBGA: 8.0 mils
mutual inductance to the nearest neighbor lead.
Lattice Semiconductor
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