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OR2T15B7BA352-DB View Datasheet(PDF) - Lattice Semiconductor

Part Name
Description
Manufacturer
OR2T15B7BA352-DB
Lattice
Lattice Semiconductor 
OR2T15B7BA352-DB Datasheet PDF : 200 Pages
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ORCA Series 2 FPGAs
Data Sheet
November 2006
Package Parasitics (continued)
These parameters are important in determining ground bounce noise and inductive crosstalk noise. Three capaci-
tances in pF are listed: CM, the mutual capacitance of the lead to the nearest neighbor lead; and C1 and C2, the
total capacitance of the lead to all other leads (all other leads are assumed to be grounded). These parameters are
important in determining capacitive crosstalk and the capacitive loading effect of the lead.
The parasitic values in Table 30 are for the circuit model of bond wire and package lead parasitics. If the mutual
capacitance value is not used in the designer’s model, then the value listed as mutual capacitance should be
added to each of the C1 and C2 capacitors.
S Table 30. Series 2 Package Parasitics
E Package Type
LSW
LMW
RW
C1
C2
CM
LSL
LML
84-Pin PLCC
3
1
140
1
1
0.5
7—11
3—6
IC 100-Pin TQFP
3
1
150
0.5
0.5
0.4
4—6
2—3
144-Pin TQFP
3
1
140
1
1
0.6
4—6 2—2.5
D 160-Pin QFP
4
1.5
180
1.5
1.5
1
10—13 6—8
V 208-Pin SQFP
4
2
200
1
1
1
7—10
4—6
E 208-Pin SQFP2
4
2
200
1
1
1
6—9
4—6
E 240-Pin SQFP
4
2
200
1
1
1
8—12
5—8
U 240-Pin SQFP2
4
2
200
1
1
1
7—11
4—7
256-Pin PBGA
5
2
220
1
1
1
5—8
2—4
D IN 304-Pin SQFP
5
2
220
1
1
1
12—18 7—12
304-Pin SQFP2
5
2
220
1
1
1
11—17 7—12
352-Pin PBGA
5
2
220
1.5
1.5
1.5
7—12
3—6
T T 432-Pin EBGA
4
1.5
500
1
1
0.3
3—5.5 0.5—1
C N LW
RW
PAD N
LE O LMW CM
LL
C1
LML
CIRCUIT
BOARD PAD
C2
E C PADN+1
S ISLW
RW
LL
D C1
C2
5-3862(F).r2
Figure 53. Package Parasitics
130
Lattice Semiconductor

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