OR2T15B7BA352-DB View Datasheet(PDF) - Lattice Semiconductor

Part Name

Description

Manufacturer

OR2T15B7BA352-DB

ORCA® Series 2 Field-Programmable Gate Arrays

Lattice Semiconductor 

Data Sheet

November 2006

Timing Characteristics (continued)

ORCA Series 2 FPGAs

XSW LINES

FDBK_DEL

ES A[4:0], B[4:0]

PFU

F4*_DEL

4

(LUT)

OUTPUT MUX

F[3:0]

IC D A[4:0], B[4:0]

F5*_DEL

(LUT)

2

MUX_DEL

V E A[4:0], B[4:0]

E U C0

(LUT)

2 XOR_DEL

ND_DEL

C0MUX_DEL, C0XOR_DEL, C0ND_DEL

F3, F0

F1

C

O[4:0]

F2

D IN C = controlled by configuration RAM.

Notes:

T The parameters MUX_DEL, XOR_DEL, and ND_DEL include the delay through the LUT in F5A/F5B modes.

T See Table 41 for an explanation of FDBK_DEL and OMUX_DEL.

SELDEICSCON Figure 54. Combinatorial PFU Timing

5-4633(F).a

Lattice Semiconductor

135

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