OR2T15B7BA352-DB View Datasheet(PDF) - Lattice Semiconductor
Part Name
Description
Manufacturer
OR2T15B7BA352-DB Datasheet PDF : 200 Pages
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ORCA Series 2 FPGAs
Data Sheet
November 2006
Electrical Characteristics
Table 31A. OR2CxxA and OR2TxxA Electrical Characteristics
OR2CxxA Commercial: VDD = 5.0 V ± 5%, 0 °C ≤ TA ≤ 70 °C; OR2CxxA Industrial: VDD = 5.0 V ± 10%, –40 °C ≤ TA ≤ +85 °C.
OR2TxxA Commercial: VDD = 3.0 V to 3.6 V, 0 °C ≤ TA ≤ 70 °C; OR2TxxA Industrial: VDD = 3.0 V to 3.6 V, –40 °C ≤ TA ≤
+85 °C.
Parameter
S Input Voltage:
High
Low
E Input Voltage:
High
Low
Output Voltage:
IC High
D Low
Input Leakage Current
Standby Current:
V E OR2C04A/OR2T04A
OR2C06A/OR2T06A
OR2C08A/OR2T08A
E U OR2C10A/OR2T10A
OR2C12A
OR2C15A/OR2T15A
D OR2C26A/OR2T26A
IN OR2C40A/OR2T40A
Standby Current:
OR2C04A/OR2T04A
T OR2C06A/OR2T06A
T OR2C08A/OR2T08A
OR2C10A/OR2T10A
C OR2C12A
N OR2C15A/OR2T15A
OR2C26A/OR2T26A
E OR2C40A/OR2T40A
O Data Retention Voltage
Input Capacitance
EL C Output Capacitance
S IS DONE Pull-up Resistor*
M3, M2, M1, and M0
Pull-up Resistors*
D I/O Pad Static Pull-up
Sym-
bol
VIH
VIL
VIH
VIL
VOH
VOL
IL
IDDSB
IDDSB
VDR
CIN
COUT
RDONE
RM
IPU
Test Conditions
Input configured as CMOS
Input configured as TTL
(valid for OR2CxxA only)
OR2CxxA
Min Max
OR2TxxA
Unit
Min
Max
50% VDD VDD + 0.3 50% VDD5 VDD5 + 0.3 V
GND – 0.5 30% VDD GND – 0.5 30% VDD5 V
2.0 VDD + 0.3
—
– 0.5
0.8
—
—
V
—
V
VDD = min, IOH = 6 mA or 3 mA
2.4
—
VDD = min, IOL = 12 mA or 6 mA
—
0.4
VDD = Max, VIN = VSS or VDD
–10
10
OR2CxxA (TA = 25 °C, VDD = 5.0 V)
OR2TxxA (TA = 25 °C, VDD = 3.3 V)
—
6.5
internal oscillator running,
—
7.0
no output loads,
—
7.7
inputs at VDD or GND
—
8.4
(after configuration)
—
9.2
—
10.0
—
12.2
—
16.3
OR2CxxA (TA = 25 °C, VDD = 5.0 V)
OR2TxxA (TA = 25 °C, VDD = 3.3 V)
—
1.5
internal oscillator stopped,
—
2.0
no output loads,
—
2.7
inputs at VDD or GND
—
3.4
(after configuration)
—
4.2
—
5.0
—
7.2
—
11.3
TA = 25 °C
2.3
—
OR2CxxA (TA = 25 °C, VDD = 5.0 V) —
9
OR2TxxA (TA = 25 °C, VDD = 3.3 V)
Test frequency = 1 MHz
OR2CxxA (TA = 25 °C, VDD = 5.0 V) —
9
OR2TxxA (TA = 25 °C, VDD = 3.3 V)
Test frequency = 1 MHz
—
100k
—
—
100k
—
2.4
—
–10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2.3
—
—
100k
100k
—
V
0.4
V
10
µA
4.0
mA
4.3
mA
4.8
mA
5.3
mA
5.8
mA
6.3
mA
7.8
mA
10.6 mA
1.0
mA
1.3
mA
1.8
mA
2.3
mA
2.8
mA
3.3
mA
4.8
mA
7.6
mA
—
V
9
pF
9
pF
—
Ω
—
Ω
OR2CxxA (VDD = 5.25 V, VIN = VSS, 14.4
50.9
14.4
50.9
µA
Current*
TA = 0 °C)
OR2TxxA (VDD = 3.6 V, VIN = VSS,
TA = 0 °C)
I/O Pad Static Pull-down IPD OR2CxxA (VDD = 5.25 V, VIN = VSS,
26
103
26
103
µA
Current
TA = 0 °C)
OR2TxxA (VDD = 3.6 V, VIN = VSS,
TA = 0 °C)
I/O Pad Pull-up Resistor* RPU
VDD = All, VIN = VSS, TA = 0 °C
100k
—
100k
—
Ω
I/O Pad Pull-down
RPD
VDD = All, VIN = VDD, TA = 0 °C
50k
—
50k
—
Ω
Resistor
* On the OR2TxxA devices, the pull-up resistor will externally pull the pin to a level 1.0 V below VDD.
132
Lattice Semiconductor
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