ADP3193AJCPZ-RL View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADP3193AJCPZ-RL Datasheet PDF : 32 Pages
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ADP3193A
less than 400 mW. In this example, with ICC = 7 mA, QGMF = 5.8 nC,
and QGSF = 48 nC, there is 191 mW in each driver, which is below
the 400 mW dissipation limit. See the ADP3120A data sheet for
more details.
RAMP RESISTOR SELECTION
The ramp resistor (RR) is used for setting the size of the internal
PWM ramp. The value of this resistor should be chosen to provide
the best combination of thermal balance, stability, and transient
response. Equation 23 is used for determining the optimum value.
RR
=
3×
AR × L
AD × RDS
× CR
(23)
0.2 × 320 nH
RR = 3 × 5 × 4.8 mΩ × 5 pF = 178 kΩ
where:
AR is the internal ramp amplifier gain.
AD is the current-balancing amplifier gain.
RDS is the total low-side MOSFET on resistance.
CR is the internal ramp capacitor value.
The internal ramp voltage magnitude can be calculated as follows:
VR
=
AR × (1 − D) × VVID
RR × C R × f SW
(24)
0.2 × (1 − 0.117) × 1.4 V
VR = 178 kΩ × 5 pF × 330 kHz = 842 mV
The size of the internal ramp can be increased or decreased. If it is
increased, stability and noise rejection improve, but the transient
response degrades. Conversely, if the ramp size is decreased, the
transient response improves, but noise rejection and stability
degrade.
In the denominator of Equation 23, the factor of 3 sets a ramp
size that produces an optimal balance for good stability, transient
response, and thermal balance.
COMP PIN RAMP
In addition to the internal ramp, there is a ramp signal on the
COMP pin due to the droop voltage and output voltage ramps.
This ramp amplitude adds to the internal ramp to produce the
following overall ramp signal at the PWM input:
( ) VRT
=
⎜⎜⎝⎛1 −
VR
2× 1−n×D
n × fSW × CX × RO
⎟⎞
⎟⎠
(25)
In this example, the overall ramp signal is 1.19 V. However,
if the ramp size is smaller than 0.5 V, increase the ramp size
to be at least 0.5 V by decreasing the ramp resistor for noise
immunity.
CURRENT-LIMIT SETPOINT
To select the current-limit setpoint, first find the resistor value
for RLIM. The current-limit threshold for the ADP3193A is set with
a constant current source flowing out of the ILIMIT pin, which
sets up a voltage (VLIM) across RLIM with a gain of 82.6 mV/V (ALIM).
Therefore, increasing RLIM now increases the current limit. RLIM
can be found using the following equation:
R LIM
=
VCL
ALIM × I ILIMIT
=
I LIM × RCSA
82.6 mV
×
R REF
(26)
In this equation, ILIM is the peak average current limit for the
supply output and is equal to the dc current limit plus the
output ripple current. In this example, choosing a dc current
limit of 88.3 A and having a ripple current of 11.7 A yields an
ILIM of 100 A, resulting in an RLIM of 121 kΩ, for which 121 kΩ
is chosen as the nearest 1% value.
The per-phase initial duty cycle limit and peak current during a
load step are determined by
D MAX
= D × VCOMP (MAX ) − VBIAS
VRT
( ) IPHMAX
≅
DMAX
fSW
×
VIN
− VVID
L
(27)
(28)
For the ADP3193A, the maximum COMP voltage (VCOMP(MAX))
is 3.4 V, and the COMP pin bias voltage (VBIAS) is 1.1 V. In this
example, the maximum duty cycle is 0.23. Because this is small
due to the VRT being much larger than 0.5 V, reduce the ramp
resistor to get closer to 0.5 V VRT and to obtain a larger duty
cycle. Choosing a ramp resistor of 267 kΩ results in a VRT of
0.79 V, a DMAX of 0.34, and a peak current of 34 A.
The limit of the peak per-phase current during the secondary
current limit is determined by
I PHLIM
≅ VCOMP (CLAMPED ) − VBIAS
AD × R DS(MAX )
(29)
For the ADP3193A, the current balancing amplifier gain (AD) is 5
and the clamped COMP pin voltage is 2 V. Using an RDS(MAX) of
5.6 mΩ (low-side on resistance at 150°C) results in a per-phase
peak current limit of 36 A. This current level can be reached only
with an absolute short at the output, and the current-limit latch-off
function shuts down the regulator before overheating can occur.
Rev. 0 | Page 24 of 32
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