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ADSP-BF516KSWZ-3(RevD) View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADSP-BF516KSWZ-3
(Rev.:RevD)
ADI
Analog Devices 
ADSP-BF516KSWZ-3 Datasheet PDF : 68 Pages
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ADSP-BF512/BF514/BF514F16/BF516/BF518/BF518F16
Table 9 shows settings for TWI_DT in the NONGPIO_DRIVE
register. Set this register prior to using the TWI port.
Table 9. TWI_DT Field Selections and VDDEXT/VBUSTWI
TWI_DT
000 (default)
001
010
011
100
101
110
111 (reserved)
VDDEXT Nominal
3.3
1.8
2.5
1.8
3.3
1.8
2.5
VBUSTWI Minimum
2.97
1.7
2.97
2.97
4.5
2.25
2.25
VBUSTWI Nominal
3.3
1.8
3.3
3.3
5
2.5
2.5
VBUSTWI Maximum
3.63
1.98
3.63
3.63
5.5
2.75
2.75
Unit
V
V
V
V
V
V
V
Clock Related Operating Conditions
Table 10 describes the timing requirements for the processor
clocks. Take care in selecting MSEL, SSEL, and CSEL ratios so as
not to exceed the maximum core clock and system clock.
Table 11 describes phase-locked loop operating conditions.
Table 10. Core Clock (CCLK) Requirements
Parameter
fCCLK
Nominal
Voltage Setting
Core Clock Frequency (VDDINT =1.33 V Minimum, All Models)
Core Clock Frequency (VDDINT =1.23 V Minimum, Industrial/Commercial Models)
Core Clock Frequency (VDDINT = 1.14 V Minimum, Industrial Models Only)
Core Clock Frequency (VDDINT = 1.10 V Minimum, Commercial Models Only)
1.400 V
1.300 V
1.200 V
1.150 V
Maximum Unit
400
MHz
300
MHz
200
MHz
200
MHz
Table 11. Phase-Locked Loop Operating Conditions
Parameter
fVCO
Voltage Controlled Oscillator (VCO) Frequency
(Commercial/Industrial Models)
Voltage Controlled Oscillator (VCO) Frequency
(Automotive Models)
1 For more information, see Ordering Guide on Page 67.
Min
72
84
Max
Unit
Instruction Rate1 MHz
Instruction Rate1 MHz
Table 12. SCLK Conditions
V /V DDEXT DDMEM
1.8 V Nominal
V /V DDEXT DDMEM
2.5 V or 3.3 V Nominal
Parameter1
Max
Max
fSCLK
CLKOUT/SCLK Frequency (VDDINT ≥ 1.230 V
80
100
Minimum)
fSCLK
CLKOUT/SCLK Frequency (VDDINT < 1.230 V)
80
80
1 fSCLK must be less than or equal to fCCLK and is subject to additional restrictions for SDRAM interface operation. See Table 28 on Page 33.
Unit
MHz
MHz
Rev. D | Page 23 of 68 | April 2014

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