dsPIC33EVXXXGM00X/10X FAMILY
REGISTER 5-5:
U-0
—
bit 15
NVMSRCADRH: NVM DATA MEMORY UPPER ADDRESS REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
U-0
—
bit 8
R/W-x
bit 7
R/W-x
R/W-x
R/W-x
R/W-x
NVMSRCADR<23:16>
R/W-x
R/W-x
R/W-x
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
bit 7-0
Unimplemented: Read as ‘0’
NVMSRCADRH<23:16>: Data Memory Upper Address bits
REGISTER 5-6: NVMSRCADRL: NVM DATA MEMORY LOWER ADDRESS REGISTER
R/W-x
bit 15
R/W-x
R/W-x
R/W-x
R/W-x
NVMSRCADR<15:8>
R/W-x
R/W-x
R/W-x
bit 8
R/W-x
bit 7
R/W-x
R/W-x
R/W-x
R/W-x
NVMSRCADR<7:1>
R/W-x
R/W-x
r-0
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
r = Reserved bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-1
bit 0
NVMSRCADRL<15:1>: Data Memory Lower Address bits
Reserved: Maintain as ‘0’
DS70005144E-page 90
2013-2016 Microchip Technology Inc.